Abstract: A notch filter is controlled synchronously with a chopper to filter out chopping ripple. In one embodiment, the notch filter is coupled to the differential output of the chopper and includes a sampling capacitor, a hold capacitor, and a second set of switches between the sampling capacitor and the hold capacitor. The second set of switches is temporarily closed once per chopper switching cycle to transfer charge from the sampling capacitor to the hold capacitor such that the ripple from the chopper is not transferred to the hold capacitor. The voltage across the hold capacitor may be coupled to any other circuit, such as to the differential inputs of an amplifier.

Abstract: A notch filter is controlled synchronously with a chopper to filter out chopping ripple. In one embodiment, the notch filter is coupled to the differential output of the chopper and includes a sampling capacitor, a hold capacitor, and a second set of switches between the sampling capacitor and the hold capacitor. The second set of switches is temporarily closed once per chopper switching cycle to transfer charge from the sampling capacitor to the hold capacitor such that the ripple from the chopper is not transferred to the hold capacitor. The voltage across the hold capacitor may be coupled to any other circuit, such as to the differential inputs of an amplifier.

Abstract: A CMOS driver with minimum shoot-through current is disclosed. The potential for shoot-through current may be eliminated or reduced with a break-before-make circuit driving an output stage. The break-before-make circuit may include a first logic element followed by a first inverter and a second logic element followed by a second inverter. The inverters may be cross-coupled to one another and/or the internal transistors may be configured with different strengths. The logic elements may be configured to eliminate or reduce potential shoot-through current paths, and the signal inputs may be controlled within a certain voltage range.

Abstract: A CMOS driver with minimum shoot-through current is disclosed. The potential for shoot-through current may be eliminated or reduced with a break-before-make circuit driving an output stage. The break-before-make circuit may include a first logic element followed by a first inverter and a second logic element followed by a second inverter. The inverters may be cross-coupled to one another and/or the internal transistors may be configured with different strengths. The logic elements may be configured to eliminate or reduce potential shoot-through current paths, and the signal inputs may be controlled within a certain voltage range.

Abstract: The present invention relates to analog computation circuits that use a synchronous demodulator topology which can be configured to perform arithmetic computation, power measurements, and/or energy measurement of various analog signals. The computation circuits have circuitry that generates an output signal based on the values of a first input signal, a second input signal, and a reference signal. This invention provides accurate computation of two signals by using modulation circuitry (e.g., &Dgr;-&Sgr; modulation circuitry), demodulation circuitry (e.g., multiplying digital-to-analog converters), delay circuitry, and output circuitry.

Abstract: The present invention relates to analog computation circuits that use a synchronous demodulator topology which can be configured to perform arithmetic computation, power measurements, and/or energy measurement of various analog signals. The computation circuits have circuitry that generates an output signal based on the values of a first input signal, a second input signal, and a reference signal. This invention provides accurate computation of two signals by using modulation circuitry (e.g., &Dgr;-&Sgr;modulation circuitry), demodulation circuitry (e.g., multiplying digital-to-analog converters), delay circuitry, and output circuitry.

Abstract: Adaptive filters are presented that dynamically adjust the level of filtering of signals output from a sigma-delta or noise-shaping pulse code modulator RMS-to-DC converter to efficiently remove noise to improve accuracy without unduly increasing conversion response time. The level of filtering is adjusted in accordance with criteria responsive to either input signal changes (e.g., variance), input signal frequency, or both. Filtering can be analog or digital.

Abstract: The invention provides methods and apparatus for performing RMS-to-DC conversion in which the input signal is sampled using circuitry that includes a clock signal. The clock signal is dithered, however, to account for various problems that may occur, such as aliasing. The dithering may occur during the sampling prior to the conversion, such as when the input signal is converted to a digital signal prior to the conversion. Alternately, the dithering may occur as part of the RMS-to-DC conversion.

Abstract: The invention provides methods and apparatus for performing RMS-to-DC conversion of input signals that have a bipolar input signal range, the methods and apparatus providing an input-output transfer gain substantially equal to unity (1.0) or other integer value. Apparatus of the invention do not require a preceding absolute value circuit, and include a modulator and a demodulator that may be implemented on a single integrated circuit and may use switched-capacitor technology.

Abstract: To overcome the disadvantages of the prior art, the present invention provides a method and apparatus for distributed focus control with slope tracking. The invention operates in the context of an ultrasonic imaging system having an array of transducers. Each transducer converts received energy into an echo signal. A beamformer of the invention dynamically focuses the received energy. The beamformer includes delay computation circuitry for computing a delay function for the echo signal at a predetermined focal range. The delay of the echo signal with respect to range has a slope. Tracking circuitry varies the delay function to track the slope, thereby determining the delay function for a next focal range. The beamformer further comprises delay circuitry for compensating for the delay function of the echo signal. The delay function is an estimated relative delay with respect to a reference delay of an echo signal from a reference transducer.

Abstract: An ultrasonic receive beamformer includes transducers forming receive signals that are applied to sub-array processors. Each sub-array processor includes at least one phase shifter and a summer, and each phase shifter is responsive to at least one of the transducer signals to shift the transducer signal by a respective phase angle and to apply the phase shifted transducer signals to the summer. Each of the summers supplies a summed sub-array signal to a respective beamformer processor. The phase angles for any one of the sub-array processors form a sum substantially equal to zero. Furthermore, the phase angles for any one of the sub-array processors are independent of the time delay of the respective digital beamformer processor. The time resolution of the time delay of the digital beamformer processors is substantially as fine as the time resolution of the phase angles of the phase shifters.

Abstract: An ultrasonic receive beamformer includes transducers forming receive signals that are applied to sub-array processors. Each sub-array processor includes at least one phase shifter and a summer, and each phase shifter is responsive to at least one of the transducer signals to shift the transducer signal by a respective phase angle and to apply the phase shifted transducer signals to the summer. Each of the summers supplies a summed sub-array signal to a respective beamformer processor. The phase angles for any one of the sub-array processors form a sum substantially equal to zero. Furthermore, the phase angles for any one of the sub-array processors are independent of the time delay of the respective digital beamformer processor. The time resolution of the time delay of the digital beamformer processors is substantially as fine as the time resolution of the phase angles of the phase shifters.

Abstract: An ultrasonic receive system includes two receive beamformers. A first receive beamformer is optimized for imaging modes such as B-mode and color Doppler flow imaging, and therefore has high spatial resolution and wide bandwidth, while the accompanying second receive beamformer has a wide dynamic range and is dedicated for use in acquiring spectral Doppler information, which is typically narrowband compared to imaging information. The second receive beamformer achieves the sensitivity and low-noise performance of a dedicated single-channel pencil probe instrument yet it also performs electronic beam steering. Both receive beamformers can operate through a common transducer array, thereby increasing exam efficiency and permitting registration of spectral Doppler information with a B-mode or color Doppler flow image.

Abstract: A notch filter is controlled synchronously with a chopper to filter out chopping ripple. In one embodiment, the notch filter is coupled to the differential output of the chopper and includes a sampling capacitor, a hold capacitor, and a second set of switches between the sampling capacitor and the hold capacitor. The second set of switches is temporarily closed once per chopper switching cycle to transfer charge from the sampling capacitor to the hold capacitor such that the ripple from the chopper is not transferred to the hold capacitor. The voltage across the hold capacitor may be coupled to any other circuit, such as to the differential inputs of an amplifier.