Patents by Inventor Joseph Garofalo

Joseph Garofalo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9295594
    Abstract: An absorbent article comprises a bodyside liner, an outer cover, an absorbent body located between the bodyside liner and the outer cover, and an enclosure. The enclosure comprises a cover and backing joined together to form a pocket with an object disposed therein. The enclosure is joined with the absorbent article and is adapted to transition from a closed condition to an open condition such that the object disposed within the enclosure may be accessed.
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: March 29, 2016
    Assignee: Kimberly-Clark Worldwide, Inc.
    Inventors: Jason C. Cohen, Kenneth Thomas Borowski, Rodney Lee Miller, Jr., Martin Joseph Garofalo, David William Koenig, Tatum Marie Jelenc, Eric Donald Johnson
  • Patent number: 8875071
    Abstract: An automated method is provided for designing an integrated circuit. A net list of an integrated circuit design is generated, wherein the net list includes a scan chain having a sequence of individual scan cells. A sequence of two or more individual scan cells of the scan chain is identified as a candidate for replacement by a custom shift array macro cell. The identified sequence of two or more individual scan cells is then replaced with a custom shift array macro cell that provides a functionally equivalent shift function as the replaced sequence of two or more individual scan cells. The custom shift array macro cell includes only two input pins and one output pin.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: October 28, 2014
    Assignee: LSI Corporation
    Inventors: Hai Wang, Joseph Garofalo, Barry L. Bartholomew, Liu Ming Xu, Han Jun Zhang, You Xin Rao, Qin Xie
  • Publication number: 20140270050
    Abstract: An automated method is provided for designing an integrated circuit. A net list of an integrated circuit design is generated, wherein the net list includes a scan chain having a sequence of individual scan cells. A sequence of two or more individual scan cells of the scan chain is identified as a candidate for replacement by a custom shift array macro cell. The identified sequence of two or more individual scan cells is then replaced with a custom shift array macro cell that provides a functionally equivalent shift function as the replaced sequence of two or more individual scan cells. The custom shift array macro cell includes only two input pins and one output pin.
    Type: Application
    Filed: May 29, 2013
    Publication date: September 18, 2014
    Inventors: Hai Wang, Joseph Garofalo, Barry L. Bartholomew, Liu Ming Xu, Han Jun Zhang, You Xin Rao, Qin Xie
  • Patent number: 8773799
    Abstract: An apparatus comprises read channel circuitry and associated signal processing circuitry comprising frontend processing circuitry and backend processing circuitry. The frontend processing circuitry comprises a loop detector and equalizer configured to determine an equalized read channel signal from a read channel signal and a decoding module configured to apply verification and scrambling processing on a decoded read channel signal. The backend processing circuitry comprises a backend detector, an interleaver, a backend decoder, and a de-interleaver configured to perform an iterative decoding process on the equalized read channel signal to determine the decoded read channel signal. The frontend processing circuitry is controlled by a first clock having an associated first clock rate and the backend processing circuitry is controlled by a selected one of the first clock and a second clock having an associated second clock rate determined at least in part by the first clock rate and a maximum clock rate.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: July 8, 2014
    Assignee: LSI Corporation
    Inventors: Suharli Tedja, Shaohua Yang, Fan Zhang, Qi Zuo, Joseph Garofalo, Yu Kou
  • Publication number: 20140181570
    Abstract: An apparatus comprises read channel circuitry and associated signal processing circuitry comprising frontend processing circuitry and backend processing circuitry. The frontend processing circuitry comprises a loop detector and equalizer configured to determine an equalized read channel signal from a read channel signal and a decoding module configured to apply verification and scrambling processing on a decoded read channel signal. The backend processing circuitry comprises a backend detector, an interleaver, a backend decoder, and a de-interleaver configured to perform an iterative decoding process on the equalized read channel signal to determine the decoded read channel signal. The frontend processing circuitry is controlled by a first clock having an associated first clock rate and the backend processing circuitry is controlled by a selected one of the first clock and a second clock having an associated second clock rate determined at least in part by the first clock rate and a maximum clock rate.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 26, 2014
    Applicant: LSI Corporation
    Inventors: Suharli Tedja, Shaohua Yang, Fan Zhang, Qi Zuo, Joseph Garofalo, Yu Kou
  • Patent number: 8745558
    Abstract: A method is provided for designing an integrated circuit. The method includes generating a net list of an integrated circuit design, wherein the net list includes one or more component cells selected from a cell library. The component cells include transmission gate logic cells and sourcing cells that drive the transmission gate logic cells. Each transmission gate logic cell has an associated timing model with a timing characteristic defined as a function of a driving strength attribute of a sourcing cell used to characterize the transmission gate logic cell. The method further includes auditing the net list to determine if a given sourcing cell in the integrated circuit design has a sufficient driving strength based at least on the driving strength attribute of a transmission gate logic cell being driven by the given sourcing cell.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: June 3, 2014
    Assignee: LSI Corporation
    Inventors: Joseph Garofalo, Barry L. Bartholomew, Mujiang Luo, You Xin Rao
  • Publication number: 20130324961
    Abstract: An absorbent article comprises a bodyside liner, an outer cover, an absorbent body located between the bodyside liner and the outer cover, and an enclosure. The enclosure comprises a cover and backing joined together to form a pocket with an object disposed therein. The enclosure is joined with the absorbent article and is adapted to transition from a closed condition to an open condition such that the object disposed within the enclosure may be accessed.
    Type: Application
    Filed: August 8, 2013
    Publication date: December 5, 2013
    Applicant: Kimberly-Clark Worldwide, Inc.
    Inventors: Jason C. Cohen, Kenneth Thomas Borowski, Rodney Lee Miller, JR., Martin Joseph Garofalo, David William Koenig, Tatum Marie Jeleno, Eric Donald Johnson
  • Patent number: 8529537
    Abstract: An absorbent article comprises a bodyside liner, an outer cover, an absorbent body located between the bodyside liner and the outer cover, and an enclosure. The enclosure comprises a cover and backing joined together to form a pocket with an object disposed therein. The enclosure is joined with the absorbent article and is adapted to transition from a closed condition to an open condition such that the object disposed within the enclosure may be accessed.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: September 10, 2013
    Assignee: Kimberly-Clark Worldwide, Inc.
    Inventors: Jason C Cohen, Kenneth Thomas Borowski, Rodney Lee Miller, Jr., Martin Joseph Garofalo, David William Koenig, Tatum Marie Jelenc, Eric Donald Johnson
  • Publication number: 20120324006
    Abstract: Systems and methods are presented in this document for connecting multiple users in remote locations to simultaneously collaborate through multi-touch devices. Any number of multi-touch devices will be capable of being connected through an Internet connection to a web server (also referred to as “cloud computing”). The user interface displays of the multi-touch devices will update each of the displays in real-time through the Internet connection to the web servers. This system will enable users to host sessions, such as conference meetings, with participants in various remote locations. At each location participants will be able to utilize the physical and interactive capabilities of a multi-touch device.
    Type: Application
    Filed: November 7, 2010
    Publication date: December 20, 2012
    Inventor: FRANK JOSEPH GAROFALO
  • Patent number: 4300413
    Abstract: A ratchet wrench which includes a pawl disposed to engage a ratchet gear carrying a drive member formed as a square shank, the pawl being selectively movable by a control rod carried in the midportion of the wrench and terminating close to its handle grasping portion and subject to digital manipulation from a grasping hand there in place. The pawl, as moved by the control rod, may be engaged with the ratchet gear to provide either clockwise or counterclockwise torque on the gear and its drive member or disengaged from the ratchet gear altogether to leave that gear and its drive member in a neutral, free-wheeling condition.
    Type: Grant
    Filed: March 3, 1980
    Date of Patent: November 17, 1981
    Inventor: Joseph Garofalo
  • Patent number: D677358
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: March 5, 2013
    Inventors: John Garofalo, Joseph Garofalo
  • Patent number: D691696
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: October 15, 2013
    Inventors: John Garofalo, Joseph Garofalo
  • Patent number: D699317
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: February 11, 2014
    Inventors: John Garofalo, Joseph Garofalo
  • Patent number: D708292
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: July 1, 2014
    Inventors: John Garofalo, Joseph Garofalo