Abstract: Provided is a system on chip comprising a memory controller having a clock synchronization circuitry based on a locked loop. The system on chip further comprises a voltage glitch attack detector configured to monitor a clock synchronization signal generated by the clock synchronization circuitry and check whether the monitored clock synchronization signal is a nominal signal or a signal characteristic of a voltage glitch attack. The voltage glitch attack detector may be a software detector executed by a processing unit. Other embodiments disclosed.