Patents by Inventor Joseph Grecco
Joseph Grecco has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240012769Abstract: Examples described herein relate to a network interface device. In some examples, the network interface device includes a network interface, a direct memory access (DMA) circuitry, a host interface, memory, one or more processors, and circuitry to: based on a configuration of operation specifying a standalone operation, cause the network interface device to operate in standalone to execute one or more applications and based on a configuration of operation specifying a companion operation, cause the network interface device to operate in companion to provide at least one host system with access to one or more hardware resources accessible by the network interface device.Type: ApplicationFiled: September 20, 2023Publication date: January 11, 2024Inventors: Francesc GUIM BERNAT, Manish DAVE, Vered BAR BRACHA, Bradley A. BURRES, Uzair QURESHI, Joseph GRECCO, Paul KAPPLER, Dirk F. BLEVINS, Mukesh Gangadhar BHAVANI VENKATESAN, Hariharan M, Marek PIOTROWSKI, Dhanya PILLAI, John MANGAN, Mandar CHINCHOLKAR, Eoin WALSH, Sumit MOHAN, Ned SMITH, Tushar Sudhakar GOHAD
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Publication number: 20230214284Abstract: Embodiments described herein are generally directed to improving performance of a transactional API protocol by scheduling function calls based on data dependencies. In an example, a function associated with the transactional API is received that is to be carried out by an executer on behalf of an application. It is determined whether the function has a dependency on a value that is invalid. If so, execution of the function is delayed by causing a function ID of the function to be queued for a global memory reference associated with the value. After the value becomes valid, the function is caused to be executed by the executer. When the first function is determined to have no such dependency, the function may be immediately scheduled for execution by the executer without delay.Type: ApplicationFiled: October 25, 2022Publication date: July 6, 2023Applicant: Intel CorporationInventors: Joseph Grecco, Mukesh Gangadhar Bhavani Venkatesan, Hariharan M
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Publication number: 20230121778Abstract: Various examples relate to apparatuses, devices, methods, computer systems and computer programs for handling remote procedure calls. A non-transitory, computer-readable medium comprises machine-readable instructions that, when the program code is executed on a processor of a requesting host, causes the processor to provide an interface for locally receiving remote procedure calls from a plurality of threads of a computer program, and forward, upon receiving a remote procedure call from one of the threads of the computer program, the remote procedure call to a providing host that provides the functionality associated with the remote procedure call, wherein the remote procedure call is forwarded together with information on the thread having issued the remote procedure call.Type: ApplicationFiled: December 16, 2022Publication date: April 20, 2023Inventors: Joseph GRECCO, Mukesh Gangadhar BHAVANI VENKATESAN, Hariharan M
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Publication number: 20230070995Abstract: A system comprising an accelerator circuit comprising an accelerator function unit to implement a first function, and one or more device feature header (DFH) circuits to provide attributes associated with the accelerator function unit, and a processor to retrieve the attributes of the accelerator function unit by traversing a device feature list (DFL) referencing the one or more DFH circuits, execute, based on the attributes, an application encoding the first function to cause the accelerator function unit to perform the first function.Type: ApplicationFiled: August 9, 2022Publication date: March 9, 2023Applicant: Intel CorporationInventors: Pratik M. MAROLIA, Aaron J. GRIER, Henry M. MITCHEL, Joseph GRECCO, Michael C. ADLER, Utkarsh Y. KAKAIYA, Joshua D. FENDER, Sundar NADATHUR, Nagabhushan CHITLUR
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Publication number: 20230048915Abstract: A method of offloading performance of a workload includes receiving, on a first computing system acting as an initiator, a first function call from a caller, the first function call to be executed by an accelerator on a second computing system acting as a target, the first computing system coupled to the second computing system by a network; determining a type of the first function call; and generating a list of parameter values of the first function call.Type: ApplicationFiled: October 18, 2022Publication date: February 16, 2023Inventors: Pradeep Pappachan, Sujoy Sen, Joseph Grecco, Mukesh Gangadhar Bhavani Venkatesan, Reshma Lal
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Publication number: 20230026206Abstract: Embodiments described herein are generally directed to improving performance of a transactional API protocol by batch scheduling data dependent functions. In an example, a prescribed sequence of function calls associated with a transactional application programming interface (API) is received that is to be carried out by an executer (e.g., a compute service or a second processing resource remote from a first processing resource with which an application is associated) to perform an atomic unit of work on behalf of the application. Transport latency over an interconnect between the application and the executer is reduced by: (i) creating a batch representing the prescribed sequence of function calls in a form of a list of function descriptors in which variable arguments of the prescribed sequence of function calls are replaced with corresponding global memory references; and (ii) transmitting the batch via the interconnect as a single message.Type: ApplicationFiled: September 28, 2022Publication date: January 26, 2023Applicant: Intel CorporationInventors: Joseph Grecco, Mukesh Gangadhar Bhavani Venkatesan, Hariharan M
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Patent number: 11537457Abstract: A method of offloading performance of a workload includes receiving, on a first computing system acting as an initiator, a first function call from a caller, the first function call to be executed by an accelerator on a second computing system acting as a target, the first computing system coupled to the second computing system by a network; determining a type of the first function call; and generating a list of parameter values of the first function call.Type: GrantFiled: June 25, 2021Date of Patent: December 27, 2022Assignee: INTEL CORPORATIONInventors: Pradeep Pappachan, Sujoy Sen, Joseph Grecco, Mukesh Gangadhar Bhavani Venkatesan, Reshma Lal
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Patent number: 11531635Abstract: Technologies for providing I/O channel abstraction for accelerator device kernels include an accelerator device comprising circuitry to obtain availability data indicative of an availability of one or more accelerator device kernels in a system, including one or more physical communication paths to each accelerator device kernel. The circuitry is also configured to determine whether to establish a logical communication path between a kernel of the present accelerator device and another accelerator device kernel and establish, in response to a determination to establish the logical communication path as a function of the obtained availability data, the logical communication path between the kernel of the present accelerator device and the other accelerator device kernel.Type: GrantFiled: November 3, 2020Date of Patent: December 20, 2022Assignee: Intel CorporationInventors: Susanne M. Balle, Evan Custodio, Francesc Guim Bernat, Sujoy Sen, Slawomir Putyrski, Paul Dormitzer, Joseph Grecco
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Patent number: 11416300Abstract: A system comprising an accelerator circuit comprising an accelerator function unit to implement a first function, and one or more device feature header (DFH) circuits to provide attributes associated with the accelerator function unit, and a processor to retrieve the attributes of the accelerator function unit by traversing a device feature list (DFL) referencing the one or more DFH circuits, execute, based on the attributes, an application encoding the first function to cause the accelerator function unit to perform the first function.Type: GrantFiled: June 29, 2017Date of Patent: August 16, 2022Assignee: Intel CorporatonInventors: Pratik M. Marolia, Aaron J. Grier, Henry M. Mitchel, Joseph Grecco, Michael C. Adler, Utkarsh Y. Kakaiya, Joshua D. Fender, Sundar Nadathur, Nagabhushan Chitlur
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Publication number: 20210318920Abstract: A method of offloading performance of a workload includes receiving, on a first computing system acting as an initiator, a first function call from a caller, the first function call to be executed by an accelerator on a second computing system acting as a target, the first computing system coupled to the second computing system by a network; determining a type of the first function call; and generating a list of parameter values of the first function call.Type: ApplicationFiled: June 25, 2021Publication date: October 14, 2021Applicant: Intel CorporationInventors: Pradeep Pappachan, Sujoy Sen, Joseph Grecco, Mukesh Gangadhar Bhavani Venkatesan, Reshma Lal
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Publication number: 20210073047Abstract: Technologies for managing accelerator resources include a cloud resource manager (102) to receive accelerator usage information from each of a plurality of node compute devices (104) and task parameters of a task to be performed. The cloud resource manager (102) accesses a task distribution policy, determines a destination node compute device (104) of the plurality of node compute devices (104) based on the task parameters and the task distribution policy, and assigns the task to the destination node compute device (104).Type: ApplicationFiled: September 30, 2017Publication date: March 11, 2021Inventors: Malini K. BHANDARU, Sundar NADATHUR, Joseph GRECCO, Roman DOBOSZ, Yongfeng DU
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Publication number: 20210073161Abstract: Technologies for providing I/O channel abstraction for accelerator device kernels include an accelerator device comprising circuitry to obtain availability data indicative of an availability of one or more accelerator device kernels in a system, including one or more physical communication paths to each accelerator device kernel. The circuitry is also configured to determine whether to establish a logical communication path between a kernel of the present accelerator device and another accelerator device kernel and establish, in response to a determination to establish the logical communication path as a function of the obtained availability data, the logical communication path between the kernel of the present accelerator device and the other accelerator device kernel.Type: ApplicationFiled: November 3, 2020Publication date: March 11, 2021Inventors: Susanne M. BALLE, Evan CUSTODIO, Francesc GUIM BERNAT, Sujoy SEN, Slawomir PUTYRSKI, Paul DORMITZER, Joseph GRECCO
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Patent number: 10853296Abstract: Technologies for providing I/O channel abstraction for accelerator device kernels include an accelerator device comprising circuitry to obtain availability data indicative of an availability of one or more accelerator device kernels in a system, including one or more physical communication paths to each accelerator device kernel. The circuitry is also configured to determine whether to establish a logical communication path between a kernel of the present accelerator device and another accelerator device kernel and establish, in response to a determination to establish the logical communication path as a function of the obtained availability data, the logical communication path between the kernel of the present accelerator device and the other accelerator device kernel.Type: GrantFiled: December 28, 2018Date of Patent: December 1, 2020Assignee: Intel CorporationInventors: Susanne M. Balle, Evan Custodio, Francesc Guim Bernat, Sujoy Sen, Slawomir Putyrski, Paul Dormitzer, Joseph Grecco
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Publication number: 20200341810Abstract: Technologies for providing an accelerator device discovery service include a device having circuitry configured to obtain, from a discovery service, availability data indicative of a set of accelerator devices available to assist in the execution of a workload. The circuitry is also configured to select, as a function of the availability data, one or more target accelerator devices to assist in the execution of the workload, and execute the workload with the one or more target accelerator devices.Type: ApplicationFiled: April 24, 2019Publication date: October 29, 2020Inventors: Narayan Ranganathan, Sujoy Sen, Joseph Grecco, Slawomir Putyrski
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Patent number: 10678737Abstract: Technologies for providing dynamic communication path modification for accelerator device kernels include an accelerator device comprising circuitry to obtain initial availability data indicative of an availability of one or more accelerator device kernels in a system, including one or more physical communication paths to each accelerator device kernel. The circuitry is also to produce, as a function of the initial availability data, a connectivity matrix indicative of the physical communication paths and a logical communication path defined by one or more of the physical communication paths between a kernel of the present accelerator device and a target accelerator device kernel. Additionally, the circuitry is to obtain updated availability data indicative of a subsequent availability of each accelerator device kernel and update, as a function of the updated availability data, the connectivity matrix to modify the logical communication path.Type: GrantFiled: December 28, 2018Date of Patent: June 9, 2020Assignee: Intel CorporationInventors: Susanne M. Balle, Slawomir Putyrski, Joseph Grecco, Evan Custodio, Francesc Guim Bernat
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Publication number: 20200174841Abstract: A system comprising an accelerator circuit comprising an accelerator function unit to implement a first function, and one or more device feature header (DFH) circuits to provide attributes associated with the accelerator function unit, and a processor to retrieve the attributes of the accelerator function unit by traversing a device feature list (DFL) referencing the one or more DFH circuits, execute, based on the attributes, an application encoding the first function to cause the accelerator function unit to perform the first function.Type: ApplicationFiled: June 29, 2017Publication date: June 4, 2020Applicant: Intel CorporationInventors: Pratik M. MAROLIA, Aaron J. GRIER, Henry M. MITCHEL, Joseph GRECCO, Michael C. ADLER, Utkarsh Y. KAKAIYA, Joshua D. FENDER, Sundar NADATHUR, Nagabhushan CHITLUR
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Publication number: 20200004712Abstract: Technologies for providing I/O channel abstraction for accelerator device kernels include an accelerator device comprising circuitry to obtain availability data indicative of an availability of one or more accelerator device kernels in a system, including one or more physical communication paths to each accelerator device kernel. The circuitry is also configured to determine whether to establish a logical communication path between a kernel of the present accelerator device and another accelerator device kernel and establish, in response to a determination to establish the logical communication path as a function of the obtained availability data, the logical communication path between the kernel of the present accelerator device and the other accelerator device kernel.Type: ApplicationFiled: December 28, 2018Publication date: January 2, 2020Inventors: Susanne M. Balle, Evan Custodio, Francesc Guim Bernat, Sujoy Sen, Slawomir Putyrski, Paul Dormitzer, Joseph Grecco
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Publication number: 20190138481Abstract: Technologies for providing dynamic communication path modification for accelerator device kernels include an accelerator device comprising circuitry to obtain initial availability data indicative of an availability of one or more accelerator device kernels in a system, including one or more physical communication paths to each accelerator device kernel. The circuitry is also to produce, as a function of the initial availability data, a connectivity matrix indicative of the physical communication paths and a logical communication path defined by one or more of the physical communication paths between a kernel of the present accelerator device and a target accelerator device kernel. Additionally, the circuitry is to obtain updated availability data indicative of a subsequent availability of each accelerator device kernel and update, as a function of the updated availability data, the connectivity matrix to modify the logical communication path.Type: ApplicationFiled: December 28, 2018Publication date: May 9, 2019Inventors: Susanne M. Balle, Slawomir Putyrski, Joseph Grecco, Evan Custodio, Francesc Guim Bernat
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Publication number: 20180331900Abstract: An embodiment of a device manager apparatus may include a request processor to process a request for a reconfiguration of a reconfigurable device, a configuration controller communicatively coupled to the request processor to reconfigure the reconfigurable device based on the request, and a pseudo-device manager communicatively coupled to the request processor to create a pseudo device based on the request which corresponds to a functionality of the reconfiguration.Type: ApplicationFiled: May 11, 2017Publication date: November 15, 2018Applicant: Intel CorporationInventors: Utkarsh Y. Kakaiya, Joshua D. Fender, Joseph Grecco, Prashant Sethi, Nagabhushan Chitlur, Pratik M. Marolia, Henry M. Mitchel
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Publication number: 20070234347Abstract: In one embodiment, an apparatus includes a framework module to receive a transmitted and shared media processing component and to install the media processing component within the framework module. The apparatus further includes a receiving application agent, operatively coupled to the framework module, to receive a media stream and to process the media stream using the installed media processing component within the framework module.Type: ApplicationFiled: March 29, 2006Publication date: October 4, 2007Inventors: Joseph Grecco, Michael Stanford