Patents by Inventor Joseph Greco

Joseph Greco has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11969489
    Abstract: A personal care cosmetic composition; its method of manufacture; and its method of use are disclosed.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: April 30, 2024
    Assignee: JOHNSON & JOHNSON CONSUMER INC.
    Inventors: Joseph Greco, Jessica Maciejewski, Alexandria Dinapoli Marzano, MaryRose Wagner
  • Patent number: 11973060
    Abstract: A TSV of a first semiconductor die may extend from a semiconductor substrate of the first semiconductor die through at least one metallization layer of the die to connect to a metallization layer to supply power to the second semiconductor die. By extending the TSV, resistance may be reduced, allowing for enhanced power delivery to the second semiconductor die. Resistance may be further reduced by allowing for the TSV to connect to a thicker metallization layer than would otherwise be possible. Also, in some embodiments, the TSV may connect to a metallization layer that is suitable for supplying power to both semiconductor dies. The first semiconductor die may be a top die or a bottom die in a face-to-face arrangement. Disclosed concepts may be extended to any number of dies included in a die stack that includes the face-to-face arrangement.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: April 30, 2024
    Assignee: NVIDIA Corporation
    Inventors: Joseph Greco, Joseph Minacapelli
  • Publication number: 20240126086
    Abstract: Systems and methods are disclosed for operating a head-mounted display system based on user perceptibility. The display system may be an augmented reality display system configured to provide virtual content on a plurality of depth planes by presenting the content with different amounts of wavefront divergence. Some embodiments include obtaining an image captured by an imaging device of the display system. Whether a threshold measure or more of motion blur is determined to be exhibited in one or more regions of the image. Based on a determination that the threshold measure or more of motion blur is exhibited in one or more regions of the image, one or more operating parameters of the wearable display are adjusted. Example operating parameter adjustments comprise adjusting the depth plane on which content is presented (e.g., by switching from a first depth plane to a second depth plane), adjusting a rendering quality, and adjusting power characteristics of the system.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 18, 2024
    Inventors: Lionel Ernest Edwin, Ivan Li Chuen Yeoh, Samuel A. Miller, Edwin Joseph Selker, Adam Charles Carlson, Bjorn Nicolaas Servatius Vlaskamp, Paul M. Greco
  • Patent number: 11891828
    Abstract: A platform for a cemetery lowering device comprising: a base having a tapered edge, a non-skid surface, an opening for a casket to be lowered through the base, a first beam and a second beam attached to the base on one side of the opening, and a third beam and a fourth beam attached to the base on another side of the opening.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: February 6, 2024
    Inventors: Stephen J. Sabo, Jr., Joseph A Greco
  • Publication number: 20230230925
    Abstract: In accordance with the disclosure, an inductor may be formed over a semiconductor substrate of one or both dies in a face-to-face die arrangement while reducing the parasitic capacitance between the inductor and the adjacent die. In disclosed embodiments, a semiconductor device may include a void (e.g., an air gap) between the inductor and the adjacent die to reduce the parasitic capacitance between the inductor and the adjacent die. The void may be formed in the die that includes the inductor and/or the adjacent die. In some respects, the void may be etched in interface layers (e.g., comprising bump pads and dielectric material) between the semiconductor dies, and may extend along the length of the inductor.
    Type: Application
    Filed: March 27, 2023
    Publication date: July 20, 2023
    Inventors: Joseph Greco, Joseph Minacapelli
  • Patent number: 11699662
    Abstract: In accordance with the disclosure, one or both semiconductor dies in a face-to-face arrangement may include a probe pad layer formed on a face of the die to allow the die to be individually tested prior to assembly of the dies. Thus, faulty dies may be discarded individually so they are not included in a composite semiconductor device, thereby increasing device yields. The probe pad layer also allows dies to be matched so that a composite semiconductor device achieves desired performance, which may further increase device yields. In some embodiments, the probe pads of the probe pad layer formed on the face of the die may be used to individually test the die, and may remain inactive, or inert, during operation of the composite semiconductor device.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: July 11, 2023
    Assignee: NVIDIA Corporation
    Inventors: Joseph Greco, Joseph Minacapelli
  • Patent number: 11616023
    Abstract: In accordance with the disclosure, an inductor may be formed over a semiconductor substrate of one or both dies in a face-to-face die arrangement while reducing the parasitic capacitance between the inductor and the adjacent die. In disclosed embodiments, a semiconductor device may include a void (e.g., an air gap) between the inductor and the adjacent die to reduce the parasitic capacitance between the inductor and the adjacent die. The void may be formed in the die that includes the inductor and/or the adjacent die. In some respects, the void may be etched in interface layers (e.g., comprising bump pads and dielectric material) between the semiconductor dies, and may extend along the length of the inductor.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: March 28, 2023
    Assignee: NVIDIA Corporation
    Inventors: Joseph Greco, Joseph Minacapelli
  • Patent number: 11505285
    Abstract: A boat mooring system utilizing a cylinder having an internal spring-like mechanism that allows a retaining rope to lengthen or shorten automatically to adjust for rising tide or high wind to retain a boat at a safe distance from a dock or pier.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: November 22, 2022
    Inventor: Joseph Greco
  • Publication number: 20220234689
    Abstract: A boat mooring system utilizing a cylinder having an internal spring-like mechanism that allows a retaining rope to lengthen or shorten automatically to adjust for rising tide or high wind to retain a boat at a safe distance from a dock or pier.
    Type: Application
    Filed: January 22, 2021
    Publication date: July 28, 2022
    Inventor: Joseph Greco
  • Patent number: 11286685
    Abstract: A platform for a cemetery lowering device comprising a one-piece base, a first beam and a second beam. The one-piece base having a tapered edge, a non-skid surface, and an opening for a casket to be lowered through the base. The first beam attached to the one-piece base on one side of the opening and a second beam attached to the one-piece base on another side of the opening.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: March 29, 2022
    Inventors: Stephen J. Sabo, Jr., Joseph A Greco
  • Publication number: 20210384168
    Abstract: A TSV of a first semiconductor die may extend from a semiconductor substrate of the first semiconductor die through at least one metallization layer of the die to connect to a metallization layer to supply power to the second semiconductor die. By extending the TSV, resistance may be reduced, allowing for enhanced power delivery to the second semiconductor die. Resistance may be further reduced by allowing for the TSV to connect to a thicker metallization layer than would otherwise be possible. Also, in some embodiments, the TSV may connect to a metallization layer that is suitable for supplying power to both semiconductor dies. The first semiconductor die may be a top die or a bottom die in a face-to-face arrangement. Disclosed concepts may be extended to any number of dies included in a die stack that includes the face-to-face arrangement.
    Type: Application
    Filed: August 26, 2021
    Publication date: December 9, 2021
    Inventors: Joseph Greco, Joseph Minacapelli
  • Patent number: 11127719
    Abstract: A TSV of a first semiconductor die may extend from a semiconductor substrate of the first semiconductor die through at least one metallization layer of the die to connect to a metallization layer to supply power to the second semiconductor die. By extending the TSV, resistance may be reduced, allowing for enhanced power delivery to the second semiconductor die. Resistance may be further reduced by allowing for the TSV to connect to a thicker metallization layer than would otherwise be possible. Also, in some embodiments, the TSV may connect to a metallization layer that is suitable for supplying power to both semiconductor dies. The first semiconductor die may be a top die or a bottom die in a face-to-face arrangement. Disclosed concepts may be extended to any number of dies included in a die stack that includes the face-to-face arrangement.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: September 21, 2021
    Assignee: NVIDIA CORPORATION
    Inventors: Joseph Greco, Joseph Minacapelli
  • Publication number: 20210244628
    Abstract: A personal care cosmetic composition; its method of manufacture; and its method of use are disclosed.
    Type: Application
    Filed: February 11, 2021
    Publication date: August 12, 2021
    Inventors: Joseph Greco, Jessica Maciejewski, Alexandria Dinapoli Marzano, MaryRose Wagner
  • Publication number: 20210233850
    Abstract: In accordance with the disclosure, one or both semiconductor dies in a face-to-face arrangement may include a probe pad layer formed on a face of the die to allow the die to be individually tested prior to assembly of the dies. Thus, faulty dies may be discarded individually so they are not included in a composite semiconductor device, thereby increasing device yields. The probe pad layer also allows dies to be matched so that a composite semiconductor device achieves desired performance, which may further increase device yields. In some embodiments, the probe pads of the probe pad layer formed on the face of the die may be used to individually test the die, and may remain inactive, or inert, during operation of the composite semiconductor device.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 29, 2021
    Inventors: Joseph Greco, Joseph Minacapelli
  • Publication number: 20210233849
    Abstract: In accordance with the disclosure, an inductor may be formed over a semiconductor substrate of one or both dies in a face-to-face die arrangement while reducing the parasitic capacitance between the inductor and the adjacent die. In disclosed embodiments, a semiconductor device may include a void (e.g., an air gap) between the inductor and the adjacent die to reduce the parasitic capacitance between the inductor and the adjacent die. The void may be formed in the die that includes the inductor and/or the adjacent die. In some respects, the void may be etched in interface layers (e.g., comprising bump pads and dielectric material) between the semiconductor dies, and may extend along the length of the inductor.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 29, 2021
    Inventors: Joseph Greco, Joseph Minacapelli
  • Publication number: 20210233893
    Abstract: A TSV of a first semiconductor die may extend from a semiconductor substrate of the first semiconductor die through at least one metallization layer of the die to connect to a metallization layer to supply power to the second semiconductor die. By extending the TSV, resistance may be reduced, allowing for enhanced power delivery to the second semiconductor die. Resistance may be further reduced by allowing for the TSV to connect to a thicker metallization layer than would otherwise be possible. Also, in some embodiments, the TSV may connect to a metallization layer that is suitable for supplying power to both semiconductor dies. The first semiconductor die may be a top die or a bottom die in a face-to-face arrangement. Disclosed concepts may be extended to any number of dies included in a die stack that includes the face-to-face arrangement.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 29, 2021
    Inventors: Joseph Greco, Joseph Minacapelli
  • Publication number: 20210010288
    Abstract: A platform for a cemetery lowering device comprising: a base having a tapered edge, a non-skid surface, an opening for a casket to be lowered through the base, a first beam and a second beam attached to the base on one side of the opening, and a third beam and a fourth beam attached to the base on another side of the opening.
    Type: Application
    Filed: September 28, 2020
    Publication date: January 14, 2021
    Inventors: Stephen J. Sabo, JR., Joseph A Greco
  • Publication number: 20200325701
    Abstract: A platform for a cemetery lowering device comprising a one-piece base, a first beam and a second beam. The one-piece base having a tapered edge, a non-skid surface, and an opening for a casket to be lowered through the base. The first beam attached to the one-piece base on one side of the opening and a second beam attached to the one-piece base on another side of the opening.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 15, 2020
    Inventors: Stephen J. Sabo, JR., Joseph A. Greco
  • Patent number: 10738500
    Abstract: A platform for a cemetery lowering device comprising a one-piece base having a tapered edge and a non-skid surface, wherein the one-piece base comprises an opening for a casket to be lowered through the base, a frame and skin, and one or more receptacles for adjustable-height footings. The frame and skin may be formed of a single piece of polymer, fiberglass, or metal. The non-skid surface may comprise grooves. The base may comprise a guide for positioning the cemetery lowering device on the base. The guide is an impression in a surface of the base. The base may comprise a first flange around a perimeter of the opening extending vertically from a top surface of the base. Each one of the receptacles is threaded such that height adjustments of the one of the adjustable-height footings can be performed by rotating the one of the adjustable-height footings.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: August 11, 2020
    Assignee: SG BURIAL PLATFORM LIMITED LIABILITY COMPANY
    Inventors: Stephen J. Sabo, Jr., Joseph A. Greco
  • Patent number: 10675195
    Abstract: The present invention generally relates to absorbent sanitary articles for absorption of body fluids and in particular to a sanitary article of this type including a buffer composition adapted to adjust the natural pH of the absorbed body fluid to a pH that is compatible with the pH of skin.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: June 9, 2020
    Assignee: EDGEWELL PERSONAL CARE BRANDS, LLC
    Inventors: Joseph Greco, David Gubernick, Claudia Massiel Montoya