Patents by Inventor Joseph Gredone
Joseph Gredone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10153870Abstract: A method and apparatus for operating supplementary cells in licensed exempt (LE) spectrum. An aggregating cell operating in a frequency division duplex (FDD) licensed spectrum is aggregated with a LE supplementary cell operating in a time sharing mode for uplink (UL) and downlink (DL) operations. The LE supplementary cell may be an FDD supplementary cell dynamically configurable between an UL only mode, a DL only mode, and a shared mode, to match requested UL and DL traffic ratios. The LE supplementary cell may be a time division duplex (TDD) supplementary cell. The TDD supplementary cell may be dynamically configurable between multiple TDD configurations. A coexistence capability for coordinating operations between the LE supplementary cell with other systems operating in the same channel is provided. Coexistence gaps are provided to measure primary/secondary user usage and permit other systems operating in the LE supplementary cell channel to access the channel.Type: GrantFiled: January 29, 2018Date of Patent: December 11, 2018Assignee: InterDigital Patent Holdongs, Inc.Inventors: Jean-Louis Gauvreau, Martino M. Freda, Zinan Lin, Joseph M. Murray, Chunxuan Ye, Erdem Bala, Mihaela C. Beluri, Douglas R. Castor, Amith V. Chincholi, Angelo A. Cuffaro, Yuying Dai, Alpaslan Demir, Joseph Gredone, Rui Yang, Liangping Ma, Rocco Di Girolamo, Debashish Purkayastha, Athmane Touag
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Publication number: 20180152268Abstract: A method and apparatus for operating supplementary cells in licensed exempt (LE) spectrum. An aggregating cell operating in a frequency division duplex (FDD) licensed spectrum is aggregated with a LE supplementary cell operating in a time sharing mode for uplink (UL) and downlink (DL) operations. The LE supplementary cell may be an FDD supplementary cell dynamically configurable between an UL only mode, a DL only mode, and a shared mode, to match requested UL and DL traffic ratios. The LE supplementary cell may be a time division duplex (TDD) supplementary cell. The TDD supplementary cell may be dynamically configurable between multiple TDD configurations. A coexistence capability for coordinating operations between the LE supplementary cell with other systems operating in the same channel is provided. Coexistence gaps are provided to measure primary/secondary user usage and permit other systems operating in the LE supplementary cell channel to access the channel.Type: ApplicationFiled: January 29, 2018Publication date: May 31, 2018Applicant: InterDigital Patent Holdings, Inc.Inventors: Jean-Louis Gauvreau, Martino M. Freda, Zinan Lin, Joseph M. Murray, Chunxuan Ye, Erdem Bala, Mihaela C. Beluri, Douglas R. Castor, Amith V. Chincholi, Angelo A. Cuffaro, Yuying Dai, Alpaslan Demir, Joseph Gredone, Rui Yang, Liangping Ma, Rocco Di Girolamo, Debashish Purkayastha, Athmane Touag
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Publication number: 20180131687Abstract: A certification provenance tree (CPT) structure may provide information concerning a layered certification of a device that comprises a hierarchy of components. The CPT structure may include a hierarchy of secure certification provenance document (SCPD) structures. Each SCPD structure in the hierarchy may represent a given component at a given level of the hierarchy of components of the device. Each SCPD structure may include a field that stores a certification proof indicating that security properties of the given component have been certified by a certification authority. An SCPD structure may further include accreditation information fields that store a pointer to an SCPD structure of a component at a next layer of the hierarchy of components of the device. The pointer may provide an indication of assurance that the component at that next layer will perform securely within this component at said given layer.Type: ApplicationFiled: September 1, 2017Publication date: May 10, 2018Inventors: Dolores F. Howry, Yogendra C. Shah, Alec Brusilovsky, Joseph Gredone
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Patent number: 9882684Abstract: A method and apparatus for operating supplementary cells in licensed exempt (LE) spectrum. An aggregating cell operating in a frequency division duplex (FDD) licensed spectrum is aggregated with a LE supplementary cell operating in a time sharing mode for uplink (UL) and downlink (DL) operations. The LE supplementary cell may be an FDD supplementary cell dynamically configurable between an UL only mode, a DL only mode, and a shared mode, to match requested UL and DL traffic ratios. The LE supplementary cell may be a time division duplex (TDD) supplementary cell. The TDD supplementary cell may be dynamically configurable between multiple TDD configurations. A coexistence capability for coordinating operations between the LE supplementary cell with other systems operating in the same channel is provided. Coexistence gaps are provided to measure primary/secondary user usage and permit other systems operating in the LE supplementary cell channel to access the channel.Type: GrantFiled: July 25, 2016Date of Patent: January 30, 2018Assignee: InterDigital Patent Holdings, Inc.Inventors: Jean-Louis Gauvreau, Martino M. Freda, Zinan Lin, Joseph M. Murray, Chunxuan Ye, Erdem Bala, Mihaela C. Beluri, Douglas R. Castor, Amith V. Chincholi, Angelo A. Cuffaro, Yuying Dai, Alpaslan Demir, Joseph Gredone, Rui Yang, Liangping Ma, Rocco Di Girolamo, Debashish Purkayastha, Athmane Touag
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Patent number: 9756037Abstract: A certification provenance tree (CPT) structure may provide information concerning a layered certification of a device that comprises a hierarchy of components. The CPT structure may include a hierarchy of secure certification provenance document (SCPD) structures. Each SCPD structure in the hierarchy may represent a given component at a given level of the hierarchy of components of the device. Each SCPD structure may include a field that stores a certification proof indicating that security properties of the given component have been certified by a certification authority. An SCPD structure may further include accreditation information fields that store a pointer to an SCPD structure of a component at a next layer of the hierarchy of components of the device. The pointer may provide an indication of assurance that the component at that next layer will perform securely within this component at said given layer.Type: GrantFiled: September 19, 2013Date of Patent: September 5, 2017Assignee: InterDigital Patent Holdings, Inc.Inventors: Dolores F. Howry, Yogendra C. Shah, Alec Brusilovsky, Joseph Gredone
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Publication number: 20160337090Abstract: A method and apparatus for operating supplementary cells in licensed exempt (LE) spectrum. An aggregating cell operating in a frequency division duplex (FDD) licensed spectrum is aggregated with a LE supplementary cell operating in a time sharing mode for uplink (UL) and downlink (DL) operations. The LE supplementary cell may be an FDD supplementary cell dynamically configurable between an UL only mode, a DL only mode, and a shared mode, to match requested UL and DL traffic ratios. The LE supplementary cell may be a time division duplex (TDD) supplementary cell. The TDD supplementary cell may be dynamically configurable between multiple TDD configurations. A coexistence capability for coordinating operations between the LE supplementary cell with other systems operating in the same channel is provided. Coexistence gaps are provided to measure primary/secondary user usage and permit other systems operating in the LE supplementary cell channel to access the channel.Type: ApplicationFiled: July 25, 2016Publication date: November 17, 2016Applicant: InterDigital Patent Holdings, Inc.Inventors: Jean-Louis Gauvreau, Martino M. Freda, Zinan Lin, Joseph M. Murray, Chunxuan Ye, Erdem Bala, Mihaela C. Beluri, Douglas R. Castor, Amith V. Chincholi, Angelo A. Cuffaro, Yuying Dai, Alpaslan Demir, Joseph Gredone, Rui Yang, Liangping Ma, Rocco Di Girolamo, Debashish Purkayastha, Athmane Touag
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Publication number: 20140129815Abstract: A device may include a trusted component. The trusted component may be verified by a trusted third party and may have a certificate of verification stored therein based on the verification by the trusted third party. The trusted component may include a root of trust that may provide secure code and data storage and secure application execution. The root of trust may also be configured to verify an integrity of the trusted component via a secure boot and to prevent access to the certain information in the device if the integrity of the trusted component may not be verified.Type: ApplicationFiled: April 15, 2010Publication date: May 8, 2014Applicant: InterDigital Patent Holdings, Inc.Inventors: Yogendra C. Shah, Inhyok Cha, Andreas Schmidt, Andreas Leicher, Joseph Gredone, Samian J. Kaur
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Patent number: 8701205Abstract: A device may include a trusted component. The trusted component may be verified by a trusted third party and may have a certificate of verification stored therein based on the verification by the trusted third party. The trusted component may include a root of trust that may provide secure code and data storage and secure application execution. The root of trust may also be configured to verify an integrity of the trusted component via a secure boot and to prevent access to the certain information in the device if the integrity of the trusted component may not be verified.Type: GrantFiled: April 15, 2010Date of Patent: April 15, 2014Assignee: InterDigital Patent Holdings, Inc.Inventors: Yogendra C. Shah, Inhyok Cha, Andreas Schmidt, Andreas Leicher, Joseph Gredone, Samian Kaur
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Publication number: 20140082352Abstract: A certification provenance tree (CPT) structure may provide information concerning a layered certification of a device that comprises a hierarchy of components. The CPT structure may include a hierarchy of secure certification provenance document (SCPD) structures. Each SCPD structure in the hierarchy may represent a given component at a given level of the hierarchy of components of the device. Each SCPD structure may include a field that stores a certification proof indicating that security properties of the given component have been certified by a certification authority. An SCPD structure may further include accreditation information fields that store a pointer to an SCPD structure of a component at a next layer of the hierarchy of components of the device. The pointer may provide an indication of assurance that the component at that next layer will perform securely within this component at said given layer.Type: ApplicationFiled: September 19, 2013Publication date: March 20, 2014Inventors: Dolores F. Howry, Yogendra C. Shah, Alec Brusilovsky, Joseph Gredone
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Publication number: 20110099361Abstract: A device may include a trusted component. The trusted component may be verified by a trusted third party and may have a certificate of verification stored therein based on the verification by the trusted third party. The trusted component may include a root of trust that may provide secure code and data storage and secure application execution. The root of trust may also be configured to verify an integrity of the trusted component via a secure boot and to prevent access to the certain information in the device if the integrity of the trusted component may not be verified.Type: ApplicationFiled: April 15, 2010Publication date: April 28, 2011Applicant: InterDigital Patent Holdings, Inc.Inventors: Yogendra C. Shah, Inhyok Cha, Andreas Schmidt, Andreas Leicher, Joseph Gredone
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Patent number: 7752482Abstract: A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The data block is employed by a gain controller. Each nibble has at least two start bits whose states collectively represent both a function and/or destination.Type: GrantFiled: July 3, 2008Date of Patent: July 6, 2010Assignee: InterDigital Technology CorporationInventors: Joseph Gredone, Alfred Stufflet, Timothy A. Axness
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Patent number: 7475273Abstract: A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The data block is employed by a gain controller.Type: GrantFiled: January 3, 2007Date of Patent: January 6, 2009Assignee: InterDigital Technology CorporationInventors: Joseph Gredone, Alfred Stufflet, Timothy A. Axness
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Publication number: 20080268800Abstract: A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The data block is employed by a gain controller. Each nibble has at least two start bits whose states collectively represent both a function and/or destination.Type: ApplicationFiled: July 3, 2008Publication date: October 30, 2008Applicant: INTERDIGITAL TECHNOLOGY CORPORATIONInventors: Joseph Gredone, Alfred Stufflet, Timothy A. Axness
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Patent number: 7240233Abstract: A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The data block is employed by a gain controller.Type: GrantFiled: June 13, 2005Date of Patent: July 3, 2007Assignee: Interdigital Technology CorporationInventors: Joseph Gredone, Alfred Stufflet, Timothy A. Axness
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Publication number: 20070113117Abstract: A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The data block is employed by a gain controller.Type: ApplicationFiled: January 3, 2007Publication date: May 17, 2007Applicant: InterDigital Technology CorporationInventors: Joseph Gredone, Alfred Stufflet, Timothy Axness
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Patent number: 7107479Abstract: A hybrid serial/parallel bus interface method and apparatus for a base station has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The method/apparatus is adaptable for either bidirectional or unidirectional applications.Type: GrantFiled: December 2, 2004Date of Patent: September 12, 2006Assignee: InterDigital Technology CorporationInventors: Joseph Gredone, Alfred W. Stufflet, Timothy A. Axness
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Patent number: 7069464Abstract: A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block.Type: GrantFiled: November 21, 2001Date of Patent: June 27, 2006Assignee: Interdigital Technology CorporationInventors: Joseph Gredone, Alfred Stufflet, Timothy A. Axness
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Publication number: 20050250461Abstract: A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The data block is employed by a gain controller.Type: ApplicationFiled: June 13, 2005Publication date: November 10, 2005Applicant: InterDigital Technology CorporationInventors: Joseph Gredone, Alfred Stufflet, Timothy Axness
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Publication number: 20050105370Abstract: A hybrid serial/parallel bus interface method and apparatus for a base station has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The method/apparatus is adaptable for either bidirectional or unidirectional applications.Type: ApplicationFiled: December 2, 2004Publication date: May 19, 2005Applicant: InterDigital Technology CorporationInventors: Joseph Gredone, Alfred Stufflet, Timothy Axness
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Patent number: 6848018Abstract: A hybrid serial/parallel bus interface method for a base station has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block.Type: GrantFiled: February 22, 2002Date of Patent: January 25, 2005Assignee: InterDigital Technology CorporationInventors: Joseph Gredone, Alfred Stufflet, Timothy A. Axness