Abstract: A fast Fourier transform circuit, including an illustrative radix-eight discrete Fourier transform (DFT) kernel that operates on an n-bit-serial data format, for an efficient serial-like, pipelined operation within the DFT. The circuit performs a four-point DFT on half of the input data words at a time, stores intermediate results from the four-point DFT in a commutation stage, then combines the intermediate results in two two-point DFTs. Internal multiplication in the eight-point DFT is effected in delay registers that also serve to store the intermediate results, thereby providing an economy of timing and circuit routing. Interleaving and deinterleaving operations convert the data format between three-bit-serial and conventional bit-parallel used outside the eight-point DFT kernel, which may therefore be easily cascaded for more complex FFT operations. The DFT kernel also includes means for selectively bypassing butterfly computation modules to perform shorter-length DFTs.

Abstract: A radix-N.sup.2 or radix-N.sup.4 discrete Fourier transform (DFT) processor having cascaded stages alternately comprising N.sup.2 -sample memories and radix-N DFT's. Data is written into and read from the memories in a sequence permitting data to be written into a memory address immediately after the previously stored data is read from the same memory address, thereby avoiding the need for double-buffered memory. In one embodiment of the invention, two radix-N.sup.2 processors are cascaded to produce a radix-N.sup.4 DFT processor with even greater memory savings.

Abstract: A special purpose computer and method of computation for performing an N-length discrete Fourier transform (DFT) using a sum and difference conjugate prime factor transform. The transform length N is selected as equal to the product of L mutually prime factors N.sub.1, N.sub.2, . . . , N.sub.1, . . . , N.sub.L. For each one of the L mutually prime factors N.sub.i, an N.sub.i -length DFT is performed. Each N.sub.i -length DFT transform is performed using a data processing element called a kernel. Each kernel includes one or more memory elements for reordering data and a computational element. The computational element includes adder circuit means for forming the sum term, SUM(n).sub.i equal to the quantity x(n.sub.i)+x(N.sub.i -n.sub.i) and the difference term, DIFF(n.sub.i) equal to x(n.sub.i)-x(N.sub.i -n.sub.i).

Abstract: A data reordering memory for writing data into the memory in one order and reading data out of the memory in a different order. The data reordering facilitates the processing of the data by a prime factor discrete Fourier transform processor.

Abstract: A special purpose computer and method of computation for performing an N-length discrete Fourier transform (DFT) using a sum and difference conjugate prime factor transform. The transform length N is selected as equal to the product of L mutually prime factors N.sub.1, N.sub.2, . . . , N.sub.i, . . . , N.sub.L. For each one of the L mutually prime factors N.sub.i, an N.sub.i -length DFT is performed. Each N.sub.i -length DFT transform is performed using a data processing element called a kernel. Each kernel includes one or more memory elements for reordering data and a computational element. The computational element includes adder circuit means for forming the sum term, SUM(n.sub.i) equal to the quantity x(n.sub.i)+x(N.sub.i -n.sub.i) and the difference term, DIFF(n.sub.i) equal to x(n.sub.i)-x(N.sub.i -n.sub.i).