Patents by Inventor Joseph H. Han
Joseph H. Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8344352Abstract: Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered to the barrier in the first place.Type: GrantFiled: July 18, 2011Date of Patent: January 1, 2013Assignee: Intel CorporationInventors: Juan E. Dominguez, Adrien R. Lavoie, John J. Plombon, Joseph H. Han, Harsono S. Simka
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Patent number: 8319287Abstract: Described herein are metal gate electrode stacks including a low resistance metal cap in contact with a metal carbonitride diffusion barrier layer, wherein the metal carbonitride diffusion barrier layer is tuned to a particular work function to also serve as a work function metal for a pMOS transistor. In an embodiment, the work function-tuned metal carbonitride diffusion barrier prohibits a low resistance metal cap layer of the gate electrode stack from migrating into the MOS junction. In a further embodiment of the present invention, the work function of the metal carbonitride barrier film is modulated to be p-type with a pre-selected work function by altering a nitrogen concentration in the film.Type: GrantFiled: February 12, 2010Date of Patent: November 27, 2012Assignee: Intel CorporationInventors: Adrien R. Lavoie, Valery M. Dubin, John J. Plombon, Juan E. Dominguez, Harsono S. Simka, Joseph H. Han, Mark Doczy
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Publication number: 20110272811Abstract: Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered to the barrier in the first place.Type: ApplicationFiled: July 18, 2011Publication date: November 10, 2011Inventors: Juan E. Dominguez, Adrien R. Lavoie, John J. Plombon, Joseph H. Han, Harsono S. Simka
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Patent number: 7982204Abstract: Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered to the barrier in the first place.Type: GrantFiled: May 27, 2010Date of Patent: July 19, 2011Assignee: Intel CorporationInventors: Juan E. Dominguez, Adrien R. Lavoie, John J. Plombon, Joseph H. Han, Harsono S. Simka
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Patent number: 7858525Abstract: A method including introducing a fluorine-free organometallic precursor in the presence of a substrate; and forming a conductive layer including a moiety of the organometallic precursor on the substrate according to an atomic layer or chemical vapor deposition process. A method including forming an opening through a dielectric layer to a contact point; introducing a fluorine-free copper film precursor and a co-reactant; and forming a copper-containing seed layer in the opening. A system including a computer including a microprocessor electrically coupled to a printed circuit board, the microprocessor including conductive interconnect structures formed from fluorine-free organometallic precursor.Type: GrantFiled: March 30, 2007Date of Patent: December 28, 2010Assignee: Intel CorporationInventors: Juan E. Dominguez, Adrien R. Lavoie, John J. Plombon, Joseph H. Han, Harsono S. Simka, Bryan C. Hendrix, Gregory T. Stauf
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Publication number: 20100230817Abstract: Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered to the barrier in the first place.Type: ApplicationFiled: May 27, 2010Publication date: September 16, 2010Inventors: Juan E. Dominguez, Adrien R. Lavoie, John J. Plombon, Joseph H. Han, Harsono S. Simka
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Patent number: 7749906Abstract: Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered to the barrier in the first place.Type: GrantFiled: February 22, 2006Date of Patent: July 6, 2010Assignee: Intel CorporationInventors: Juan E. Dominguez, Adrien R. Lavoie, John J. Plombon, Joseph H. Han, Harsono S. Simka
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Publication number: 20100140717Abstract: Described herein are metal gate electrode stacks including a low resistance metal cap in contact with a metal carbonitride diffusion barrier layer, wherein the metal carbonitride diffusion barrier layer is tuned to a particular work function to also serve as a work function metal for a pMOS transistor. In an embodiment, the work function-tuned metal carbonitride diffusion barrier prohibits a low resistance metal cap layer of the gate electrode stack from migrating into the MOS junction. In a further embodiment of the present invention, the work function of the metal carbonitride barrier film is modulated to be p-type with a pre-selected work function by altering a nitrogen concentration in the film.Type: ApplicationFiled: February 12, 2010Publication date: June 10, 2010Inventors: Adrien R. Lavoie, Valery M. Dubin, John J. Plombon, Juan E. Dominguez, Harsono S. Simka, Joseph H. Han, Mark Doczy
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Patent number: 7682891Abstract: Described herein are metal gate electrode stacks including a low resistance metal cap in contact with a metal carbonitride diffusion barrier layer, wherein the metal carbonitride diffusion barrier layer is tuned to a particular work function to also serve as a work function metal for a pMOS transistor. In an embodiment, the work function-tuned metal carbonitride diffusion barrier prohibits a low resistance metal cap layer of the gate electrode stack from migrating into the MOS junction. In a further embodiment of the present invention, the work function of the metal carbonitride barrier film is modulated to be p-type with a pre-selected work function by altering a nitrogen concentration in the film.Type: GrantFiled: December 28, 2006Date of Patent: March 23, 2010Assignee: Intel CorporationInventors: Adrien R. Lavoie, Valery M. Dubin, John J. Plombon, Juan E. Dominguez, Harsono S. Simka, Joseph H. Han, Mark Doczy
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Patent number: 7476615Abstract: An iodine-doped ruthenium barrier layer for use with copper interconnects within integrated circuits is formed using novel, iodine-containing ruthenium precursors in an ALD or CVD process. Ruthenium precursors that may be used include ruthenium containing carbonyls, arenes, cyclopentadienyls, and certain other ruthenium containing compounds. The ruthenium precursors include iodine to catalyze a subsequent copper metal deposition and to smooth the surface of the ruthenium layer. The iodine concentration across the thickness of the ruthenium barrier layer may be constant or may be graded.Type: GrantFiled: November 1, 2006Date of Patent: January 13, 2009Assignee: Intel CorporationInventors: Joseph H. Han, Harsono S. Simka, Adrien R. Lavoie, Juan E. Dominguez, John J. Plombon
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Publication number: 20080237861Abstract: A method including introducing a fluorine-free organometallic precursor in the presence of a substrate; and forming a conductive layer including a moiety of the organometallic precursor on the substrate according to an atomic layer or chemical vapor deposition process. A method including forming an opening through a dielectric layer to a contact point; introducing a fluorine-free copper film precursor and a co-reactant; and forming a copper-containing seed layer in the opening. A system including a computer including a microprocessor electrically coupled to a printed circuit board, the microprocessor including conductive interconnect structures formed from fluorine-free organometallic precursor.Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Inventors: Juan E. Dominguez, Adrien R. Lavoie, John J. Plombon, Joseph H. Han, Harsono S. Simka, Bryan C. Hendrix, Gregory T. Stauf
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Publication number: 20080182021Abstract: A method for forming a continuous ultra-thin copper layer using a low thermal budget comprises providing a substrate in a reactor, establishing a low first temperature at a surface of the substrate, introducing a copper precursor flow into the reactor to deposit the copper precursor onto the surface, introducing an inert gas flow into the reactor after the copper precursor flow, increasing the temperature at the surface of the substrate to a second temperature during the inert gas flow, and performing a chemical vapor deposition process at the second temperature to deposit a copper layer on the substrate.Type: ApplicationFiled: January 31, 2007Publication date: July 31, 2008Inventors: Harsono S. Simka, Joseph H. Han, Adrien R. Lavoie, Juan E. Dominguez, John J. Plombon
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Publication number: 20080157212Abstract: Described herein are metal gate electrode stacks including a low resistance metal cap in contact with a metal carbonitride diffusion barrier layer, wherein the metal carbonitride diffusion barrier layer is tuned to a particular work function to also serve as a work function metal for a pMOS transistor. In an embodiment, the work function-tuned metal carbonitride diffusion barrier prohibits a low resistance metal cap layer of the gate electrode stack from migrating into the MOS junction. In a further embodiment of the present invention, the work function of the metal carbonitride barrier film is modulated to be p-type with a pre-selected work function by altering a nitrogen concentration in the film.Type: ApplicationFiled: December 28, 2006Publication date: July 3, 2008Inventors: Adrien R. Lavoie, Valery M. Dubin, John J. Plombon, Juan E. Dominguez, Harsono S. Simka, Joseph H. Han, Mark Doczy
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Publication number: 20080102632Abstract: An iodine-doped ruthenium barrier layer for use with copper interconnects within integrated circuits is formed using novel, iodine-containing ruthenium precursors in an ALD or CVD process. Ruthenium precursors that may be used include ruthenium containing carbonyls, arenes, cyclopentadienyls, and certain other ruthenium containing compounds. The ruthenium precursors include iodine to catalyze a subsequent copper metal deposition and to smooth the surface of the ruthenium layer. The iodine concentration across the thickness of the ruthenium barrier layer may be constant or may be graded.Type: ApplicationFiled: November 1, 2006Publication date: May 1, 2008Inventors: Joseph H. Han, Harsono S. Simka, Adrien R. Lavoie, Juan E. Dominguez, John J. Plombon
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Publication number: 20080096381Abstract: An iridium barrier and adhesion layer for use with copper interconnects within integrated circuits is formed using an atomic layer deposition (ALD) process. The ALD process uses an organometallic iridium precursor and at least one co-reactant.Type: ApplicationFiled: October 12, 2006Publication date: April 24, 2008Inventors: Joseph H. Han, Harsono S. Simka, Adrien R. Adrien, Juan E. Dominguez, John J. Plombon
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Patent number: 7354849Abstract: A method for carrying out a damascene process to form an interconnect comprises providing a semiconductor substrate having a trench etched into a dielectric layer, wherein the trench includes a barrier layer and an adhesion layer, depositing a copper seed layer onto the adhesion layer using an ALD process, depositing an iodine catalyst layer onto the copper seed layer using an ALD process, and depositing a copper layer onto the copper seed layer using an ALD process. The iodine catalyst layer causes the copper layer to fill the trench by way of a bottom-up fill mechanism. The trench fill is performed using a single ALD process, which minimizes the creation of voids and seams in the final copper interconnect.Type: GrantFiled: February 28, 2006Date of Patent: April 8, 2008Assignee: Intel CorporationInventors: John J. Plombon, Adrien R. Lavoie, Juan E. Dominguez, Joseph H. Han, Harsono S. Simka
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Publication number: 20080045013Abstract: An iridium encased copper interconnect comprises an iridium liner formed within a trench in a dielectric layer, wherein the iridium liner is formed directly on the dielectric layer, a copper interconnect formed on the iridium liner, and an iridium capping layer formed on the copper interconnect. The iridium encased copper interconnect may be fabricated by providing a semiconductor substrate in a reactor, wherein the semiconductor substrate includes a trench etched into a dielectric layer, pulsing trimethylaluminum into the reactor proximate to the semiconductor substrate, pulsing an iridium precursor into the reactor proximate to the semiconductor substrate, wherein the trimethylaluminum enables an iridium species to deposit directly on the dielectric layer, depositing a copper seed layer on the iridium species layer using an electroless deposition process, and depositing a bulk copper layer on the copper seed layer using an electroplating process.Type: ApplicationFiled: August 18, 2006Publication date: February 21, 2008Inventors: Adrien R. Lavoie, John J. Plombon, Juan E. Dominguez, Joseph H. Han, Harsono S. Simka, Ting Zhong, Eric Dickey, Bill Barrow
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Publication number: 20070281476Abstract: Methods and associated structures of forming a microelectronic structure are described. Those methods may comprise forming a thin conformal copper layer on a surface by utilizing a formation temperature below about 125 degrees Celsius.Type: ApplicationFiled: June 2, 2006Publication date: December 6, 2007Inventors: Adrien R. Lavoie, Juan E. Dominguez, John J. Plombon, Valery M. Dubin, Harsono S. Simka, Joseph H. Han, Bryan C. Hendrix, Gregory T. Stauf, Jeffrey F. Roeder, Tiannu Chen, Chongying Xu, Thomas H. Baum