Abstract: A system controller controls subsystems in a computer. The system controller is operable with a processor in a computer. The system controller includes a plurality of decoders, each of the decoders being operable with a different processor type and being selectively activated so that the system controller can operate with a plurality of processor types. The decoders, when activated, receive processor request signals from the processor and decode the processor request signals to provide subsystem controller request signals. A controller receives the subsystem controller request signals and controls the subsystems based on the subsystem controller request signals.

Abstract: An improved partially duplicated stack structure for ensuring data integrity through a pipelined stack is described. An improved virtual first-in first-out stack structure having a plurality of parallel stacks, each for storing predetermined segments of data signals from a total data word is described in conjunction with one or more associated compare stack structures which are commonly accessed during loading and reading the stack. The compare stack is arranged for storing predetermined selected bit groupings associated with each of the segments of data signals. The bit groupings from the compare stack are compared with like-situated bit groupings from the associated segments of data signals at readout. Failure of the bit-by-bit comparison results in an indication that a stack address decode error has occurred, thereby providing through-checking of the integrity of the functioning of the stack structures.