Patents by Inventor Joseph H. Slaughter

Joseph H. Slaughter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5751025
    Abstract: A current limiter (15) is formed between a silicon substrate (10) and a source region (17) by a channel implant region (20). The channel implant region (20) is not modulated by a gate structure so the maximum voltage that can flow between the silicon substrate (10) and the source region (17) is determined by the doping profile of the ever-present channel implant region (20). A pinch-off structure (12) is used to form a depletion region which can support a large voltage potential between the silicon substrate (10) and the source region (17). In an alternate embodiment, a bipolar device is formed such that a limited current flow can be directed into a base region (32) which is used to modulate a current flow between silicon substrate (30) and an emitter region (38). Using the current limiters (15,35) it is possible to form an AC current limiter (50) that will limit the current flow regardless of the polarity of the voltage placed across two terminals (51,52).
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: May 12, 1998
    Assignee: Motorola, Inc.
    Inventors: David M. Heminger, Joseph H. Slaughter
  • Patent number: 5629536
    Abstract: A current limiter (15) is formed between a silicon substrate (10) and a source region (17) by a channel implant region (20). The channel implant region (20) is not modulated by a gate structure so the maximum voltage that can flow between the silicon substrate (10) and the source region (17) is determined by the doping profile of the ever-present channel implant region (20). A pinch-off structure (12) is used to form a depletion region which can support a large voltage potential between the silicon substrate (10) and the source region (17). In an alternate embodiment, a bipolar device is formed such that a limited current flow can be directed into a base region (32) which is used to modulate a current flow between silicon substrate (30) and an emitter region (38). Using the current limiters (15, 35) it is possible to form an AC current limiter (50) that will limit the current flow regardless of the polarity of the voltage placed across two terminals (51, 52).
    Type: Grant
    Filed: November 21, 1995
    Date of Patent: May 13, 1997
    Assignee: Motorola, Inc.
    Inventors: David M. Heminger, Joseph H. Slaughter
  • Patent number: 5391997
    Abstract: An optically isolated N-channel MOSFET driver turns on a MOSFET device in response to an optical input signal to drive a load. The turn-on time of the MOSFET is enhanced by a current boost circuit. As the MOSFET transcends to an on state and delivers current to the load, the voltage across the device diminishes and causes the current boost circuit to become inactive thus reducing to zero the current drain consumed by the current boost circuit. A photovoltaic array maintains the MOSFET operation. An optically isolated SCR is respondent to the absence of a light signal to turn off the MOSFET. Furthermore, the optical decoupling of the SCR, between the gate and source of the MOSFET device, is arranged to provide enhanced noise immunity. A voltage clamping circuit coupled between the gate and source of the MOSFET device provides additional protection to the device from large over voltages.
    Type: Grant
    Filed: October 28, 1993
    Date of Patent: February 21, 1995
    Assignee: Motorola, Inc.
    Inventors: Brian D. Meyer, David M. Heminger, Joseph H. Slaughter, III
  • Patent number: 5128729
    Abstract: Improved resistance to electrical instability of opto-isolators subjected to large stand-off voltages is obtained by coating the semiconductor light sensing element with a high resistivity layer of amorphous silicon while leaving most of the surface PN junction perimeter and nearby regions free of metal. The amorphous silicon prevents mobile ions in the encapsulation, which are driven to the detector surface by the stand-off voltage, from inverting or modulating the conductivity of the detector surface and causing instability. The amorphous silicon also makes it possible to leave most of the light sensitive PN junctions and nearby regions free of metal, thereby simplifying design of complex IC detector chips and increasing sensitivity.
    Type: Grant
    Filed: November 13, 1990
    Date of Patent: July 7, 1992
    Assignee: Motorola, Inc.
    Inventors: Paul G. Alonas, Joseph H. Slaughter, III, Niraj Kohli