Abstract: Operations include identifying a system failure affecting visibility, to at least one dual port node of a plurality of dual port nodes, of at least one of a first volume of a plurality of volumes of a first memory device or a second volume of the plurality of volumes, and modifying a visibility configuration to address the system failure. Each volume of the plurality of volumes includes a persistent memory region (PMR). Modifying the visibility configuration includes modifying the visibility of at least one of the first volume or the second volume to the at least one dual port node of the plurality of dual port nodes through its first port or its second port via the at least one switch domain of the plurality of switch domains.

Abstract: A system includes a plurality of nodes, a first memory device including a plurality of volumes each visible to at least one of the plurality of nodes within a visibility configuration, and a processing device, operatively coupled with the plurality of nodes and the first memory device. The processing device performs operations including identifying a system failure affecting visibility of at least one of the plurality of volumes of the first memory device, and modifying the visibility configuration to address the system failure.

Abstract: A system includes a memory and at least one processing device, operatively coupled to the memory, to perform operations including causing a region of a non-volatile memory device to be accessible through a persistent memory region (PMR) of a volatile memory device. The PMR utilizes a power protection mechanism to prevent data loss in an event of power loss.

Abstract: A host command is received designating a first interface standard at a first port for exposing a storage element implemented by a non-volatile memory device and a second interface standard at a second port for exposing a persistent memory region (PMR) implemented as a power protected region of a volatile memory device. The non-volatile memory device and the volatile memory device are associated with a first switch for implementing the first interface standard and a second switch for implementing the second interface standard. The first interface standard supports one or more alternate protocols implemented by the second interface standard. The storage element is exposed by designating the first interface standard at the first port and the PMR by designating the second interface standard at the second port. A segment of the PMR is allocated as a cacheable memory marked as visible through, and shared through, the second interface standard.

Abstract: A system includes a first memory device having a region allocated as a first persistent memory region (PMR) having a first set of pages, a second memory device comprising a non-volatile memory device having a region allocated as a second PMR region having a second set of pages, and at least one processing device, operatively coupled to the first memory device and the second memory device, to implement a PMR mechanism to cause the second PMR region to be accessible through the first PMR region.

Abstract: A host command is received to configure a system to have a configuration designating a first interface standard at a first port for exposing a storage element and a second interface standard at a second port for exposing a persistent memory region (PMR). The storage element is implemented on a first memory device of the system and the PMR is implemented on a second memory device of the system. The second interface standard implements one or more alternate protocols supported by the first interface standard. The system is configured in accordance with the configuration.

Abstract: A system includes a first memory device including a non-volatile memory device, a second memory device and a processing device, operatively coupled with the first memory device and the second memory device, to perform operations including configuring a system in accordance with a configuration designating an interface standard for exposing a storage element implemented on the first memory device to a first protocol of the interface standard and a persistent memory region (PMR) implemented on the second memory device to a second protocol of the interface standard, and performing at least one system operation based on the configuration.

Abstract: A system includes a first memory device including a non-volatile memory device, a second memory device and a processing device, operatively coupled with the first memory device and the second memory device, to perform operations including configuring a system in accordance with a configuration designating an interface standard for exposing a storage element implemented on the first memory device to a first protocol of the interface standard and a persistent memory region (PMR) implemented on the second memory device to a second protocol of the interface standard, and performing at least one system operation based on the configuration.

Abstract: A system includes a first memory device having a region allocated as a first persistent memory region (PMR) having a first set of pages, a second memory device comprising a non-volatile memory device having a region allocated as a second PMR region having a second set of pages, and at least one processing device, operatively coupled to the first memory device and the second memory device, to implement a PMR mechanism to cause the second PMR region to be accessible through the first PMR region.

Abstract: A host command is received to configure a system to have a configuration designating an interface standard for exposing a storage element and a persistent memory region (PMR). The storage element is visible to a first protocol of the interface standard and the PMR is visible to a second protocol of the interface standard. The storage element is implemented on a first memory device of the system including a non-volatile memory device and the PMR is implemented on a second memory device of the system. The system is configured in accordance with the configuration.

Abstract: A host command is received to configure a system to have a configuration designating a first interface standard at a first port for exposing a storage element and a second interface standard at a second port for exposing a persistent memory region (PMR). The storage element is implemented on a first memory device of the system and the PMR is implemented on a second memory device of the system. The second interface standard implements one or more alternate protocols supported by the first interface standard. The system is configured in accordance with the configuration.

Abstract: A host command is received to configure a system to have a configuration designating an interface standard for exposing a storage element and a persistent memory region (PMR). The storage element is visible to a first protocol of the interface standard and the PMR is visible to a second protocol of the interface standard. The storage element is implemented on a first memory device of the system including a non-volatile memory device and the PMR is implemented on a second memory device of the system. The system is configured in accordance with the configuration.

Abstract: A system includes a plurality of nodes, a first memory device including a plurality of volumes each visible to at least one of the plurality of nodes within a visibility configuration, and a processing device, operatively coupled with the plurality of nodes and the first memory device. The processing device performs operations including identifying a system failure affecting visibility of at least one of the plurality of volumes of the first memory device, and modifying the visibility configuration to address the system failure.

Abstract: In various embodiments, the present invention provides virtual disk formatting by intermediate devices including: (1) a storage shelf router and the storage shelf in which the storage-shelf is included, to external computing entities, such as disk-array controllers and host computers; (2) an I/O controller; and (3) a storage-bridge device. Additional embodiments of the present invention enhance virtual formatting by using additional padding, in a dual-abstraction method, to efficiently align virtual-block reads with underlying device blocks. Yet additional embodiments of the present invention allow for tracking and correcting device blocks corrupted during READ-MODIFY operations that occur during virtual-block WRITE operations. Various intermediate devices may employ two or more of the virtual formatting, dual abstraction, and corrupted-device-block tracking methods.

Abstract: One embodiment of the present invention is an integrated circuit implementing a storage-shelf router, used in combination with path controller cards and optionally with other storage-shelf routers, to interconnect SATA disks within a storage shelf or disk array to a high-bandwidth communications medium, such as an FC arbitrated loop. When two, four, six, or eight or more storage-shelf routers are used within a storage shelf, and the interconnections between the storage-shelf routers, disk drives, and external communications media are properly designed and configured, the resulting storage shelf constitutes a discrete, highly-available component that may be included in a disk array or in other types of electronic devices. The storage-shelf router features a disk-drive adaptation layer that allows a storage-shelf router to interface to, and manage, any of many different types of disk drives. The disk-drive adaptation layer includes a disk-profile table and associated firmware logic.

Abstract: Disclosed herein is a technique to protect sector remapped boundary data from corruption due to catastrophic errors such as loss of power in storage disks including SATA (Serial ATA) drives. Specially, one method is provided for protecting the boundary sector data from power failure through a data recovery mechanism, namely, a boundary sector table in which the boundary sectors are pre-stored in case any power failure or loss occurs during the sector remapped write operations. In connection with the boundary sector table stored in a reserved region of the storage disk, a boundary sector information index is provided in a bridge coupled to the disk, which serves as a key to identify and retrieve the needed boundary sector data from the table for corrupted data recovery.

Abstract: Disclosed herein is a technique to protect sector remapped boundary data from corruption due to catastrophic errors such as loss of power in storage disks including SATA (Serial ATA) drives. Specially, one method is provided for protecting the boundary sector data from power failure through a data recovery mechanism, namely, a boundary sector table in which the boundary sectors are pre-stored in case any power failure or loss occurs during the sector remapped write operations. In connection with the boundary sector table stored in a reserved region of the storage disk, a boundary sector information index is provided in a bridge coupled to the disk, which serves as a key to identify and retrieve the needed boundary sector data from the table for corrupted data recovery.

Abstract: Disclosed herein is an improved sector remapping method that maps logical sectors into physical sectors in storage disks such as SATA (Serial ATA) drives without reducing either storage capacity or I/O performance efficiency. Under this sector remapping method, logical sectors of data can be written into the physical sectors of a storage device through control frames having padded data or information associated with the padded data, as well as data frames having real data to be stored. With the padded data to be added to the real data, the frames provide multiple physical sectors to be transmitted into the storage device in a single write operation. The sector remapping method can be implemented in a storage bridge coupled to a storage device such as SATA drives.

Abstract: In various embodiments, the present invention provides virtual disk formatting by intermediate devices including: (1) a storage shelf router and the storage shelf in which the storage-shelf is included, to external computing entities, such as disk-array controllers and host computers; (2) an I/O controller; and (3) a storage-bridge device. Additional embodiments of the present invention enhance virtual formatting by using additional padding, in a dual-abstraction method, to efficiently align virtual-block reads with underlying device blocks. Yet additional embodiments of the present invention allow for tracking and correcting device blocks corrupted during READ-MODIFY operations that occur during virtual-block WRITE operations. Various intermediate devices may employ two or more of the virtual formatting, dual abstraction, and corrupted-device-block tracking methods.

Abstract: A method and system for more efficient completion of host-initiated FC I/O operations. Rather than returning FCP response frames from an FC port to host memory within an FC node, the FC port determines, from the content of received FCP response frames, whether or not an I/O operation has successfully completed. In the common case that I/O operations successfully complete, successful completion is indicated to the host processor of the FC node via a single bit flag within a completion message queued to a queue within the host memory. In the uncommon case that an I/O operation unsuccessfully completes, the FC port queues the FC response frame received from the target node to a queue within the host memory and a completion message queued to a queue within the host memory with the single bit flag set to indicate that an error has occurred.