Patents by Inventor Joseph J. Dlugokecki

Joseph J. Dlugokecki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6884663
    Abstract: A method is provided for reconstructing an integrated circuit package comprising: attaching a die to exposed wire bond pads of a lead frame so that the die is electrically connected to the lead frame; and encapsulating the die and the wire bond pads in an encapsulant; and reshaping an upper surface of the encapsulant where at least a portion of the encapsulant reshaping is performed by a lapping process.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: April 26, 2005
    Assignee: Delphon Industries, LLC
    Inventors: Joseph J. Dlugokecki, Gerardo Bagalawig Nazareno, Carmencita I. Robbins, Steven David Swendrowski
  • Patent number: 6813828
    Abstract: A method is provided for deconstructing an integrated circuit package comprising: taking an integrated circuit package comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, and an encapsulant encapsulating the wire bond pads; and removing the encapsulant to expose the wire bond pads; wherein at least a portion of the encapsulant is removed by a lapping process.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: November 9, 2004
    Assignee: Gel Pak L.L.C.
    Inventors: Joseph J. Dlugokecki, Gerardo Bagalawig Nazareno, Carmencita I. Robbins, Steven David Swendrowski
  • Publication number: 20030126741
    Abstract: A method is provided for deconstructing an integrated circuit package comprising: taking an integrated circuit package comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, and an encapsulant encapsulating the wire bond pads; and removing the encapsulant to expose the wire bond pads; wherein at least a portion of the encapsulant is removed by a lapping process.
    Type: Application
    Filed: January 7, 2002
    Publication date: July 10, 2003
    Inventors: Joseph J. Dlugokecki, Gerardo Bagalawig Nazareno, Carmencita I. Robbins, Steven David Swendrowski
  • Publication number: 20030127423
    Abstract: A method is provided for reconstructing an integrated circuit package comprising: attaching a die to exposed wire bond pads of a lead frame so that the die is electrically connected to the lead frame; and encapsulating the die and the wire bond pads in an encapsulant; and reshaping an upper surface of the encapsulant where at least a portion of the encapsulant reshaping is performed by a lapping process.
    Type: Application
    Filed: January 7, 2002
    Publication date: July 10, 2003
    Inventors: Joseph J. Dlugokecki, Gerardo Bagalawig Nazareno, Carmencita I. Robbins, Steven David Swendrowski
  • Patent number: 5700697
    Abstract: A reconstructed package for an integrated circuit (IC) chip and a method of re-configuring any prefabricated IC package (with or without a silicon chip and wires inside) so that an IC chip can be installed and interconnected for normal use. A pre-molded plastic or other package is abraded to expose the wire bond pads and to form a mounting surface to which a new chip may be mounted. The encapsulating material is removed without damaging the plating material on the lead frame. The new chip is then mounted onto the mounting surface and new wire bonds are connected between the new chip and the lead frame. Encapsulating material, such as epoxy, is then placed over the chip and wire bonds and cured. The invention provides an alternative process whereby the die can be encapsulated in minutes per unit.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: December 23, 1997
    Assignee: Silicon Packaging Technology
    Inventor: Joseph J. Dlugokecki
  • Patent number: 5406117
    Abstract: A pre-molded plastic package has encapsulation material removed so that an upper cavity is formed above the die and its associated wirebonds and a lower cavity is formed below the die attach pad and lead frame. Advantageously, the encapsulating material is removed without damaging the die, its associated wirebonds or the lead frame. An upper shield is then mounted on the top side over the still encapsulated die and wirebonds. Encapsulating material, such as epoxy, is then placed about the upper shield and cured. A lower shield is then mounted on the bottom side the die attach pad and lead frame. Encapsulating material is also placed over the lower shield and cured. Advantageously, the invention provides a process alternative whereby the shields can be installed at a very low per unit cost and in only minutes per unit without the need for custom tooling.
    Type: Grant
    Filed: December 9, 1993
    Date of Patent: April 11, 1995
    Inventors: Joseph J. Dlugokecki, Joseph R. Florian
  • Patent number: 5318926
    Abstract: A method of re-configuring any pre-fabricated plastic package (with or without a silicon chip and wires inside) so that an integrated circuit chip can be installed and interconnected for normal use. A pre-molded plastic package is abraded over (or molded to expose) the die attach pad and the wire bond pads. Advantageously, the encapsulating material is removed without damaging the plating material on the lead frame. A new chip is then mounted onto the chip mounting pad and new wire bonds are connected between the new chip and the lead frame. Encapsulating material, such as epoxy, is then placed over the chip and wire bonds and cured.
    Type: Grant
    Filed: February 1, 1993
    Date of Patent: June 7, 1994
    Inventor: Joseph J. Dlugokecki