Patents by Inventor Joseph J. Fatula, Jr.

Joseph J. Fatula, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9137043
    Abstract: System, method and program determining a network path by which a workstation can send a message to a target network. The workstation accesses a first part of the network path via a network access server. A plurality of other servers by which the workstation can access a second part of the network path leading to the target network are identified. Respective response times to communicate between the workstation or the network access server and each of the other servers are measured. A determination is made which one of the other servers has a shortest response time. The workstation attempts to connect to the one server, before attempting to connect to other of the other servers, to access the second part of the network. The second part of the network can be a virtual private network, and the other servers are entry point servers for respective virtual private networks.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: September 15, 2015
    Assignee: International Business Machines Corporation
    Inventor: Joseph J. Fatula, Jr.
  • Patent number: 7708031
    Abstract: A check valve and method for manufacture of the check valve. The check valve comprises a substrate and a channel in the substrate. The channel has an anchor region, a channel corridor and a valve seat region. There is an elastomeric valve mechanism in the channel. The valve mechanism has an anchor portion anchored in the anchor region, an elastomeric web portion in the channel corridor and a valve plug in the valve seat region. The elastomeric web portion interconnects the anchor portion and the valve plug. The elastomeric web portion is in a stretched state such that the valve plug is forced by the elastomeric web portion against the valve seat region to seal the valve seat region. The force of the elastomeric web portion can be overcome by operative fluid pressure within the channel to separate the valve plug from the valve seat region and thereby open the channel at the valve seat region to allow the fluid to exit the channel via the valve seat region.
    Type: Grant
    Filed: November 13, 2006
    Date of Patent: May 4, 2010
    Assignee: International Business Machines Corporation
    Inventor: Joseph J. Fatula, Jr.
  • Patent number: 7584226
    Abstract: A system and method for peer-to-peer grid based autonomic and probabilistic on-demand trackless backup and restore are disclosed. The on-demand trackless backup-restore system includes a plurality of nodes connected to a network communications channel. The plurality of nodes in the on-demand trackless backup-restore system includes at least one node that is a source client configured to initiate a trackless data backup-restore request and includes one or more nodes that are target clients configured to perform the trackless data backup-restore request. Further, the source client in the on-demand trackless backup-restore system is configured to establish direct connections with one or more of the target clients that are available to perform the trackless data backup-restore request.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: September 1, 2009
    Assignee: International Business Machines Corporation
    Inventors: Joseph J. Fatula, Jr., Colin Goldstein
  • Patent number: 6843894
    Abstract: A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: January 18, 2005
    Assignee: Semitool, Inc.
    Inventors: Robert W. Berner, Joseph J. Fatula, Jr., Robert Hitzfeld, Richard Contreras, Andrew Chiu
  • Patent number: 6627051
    Abstract: A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: September 30, 2003
    Assignee: Semitool, Inc.
    Inventors: Robert W. Berner, Joseph J. Fatula, Jr., Robert Hitzfeld, Richard Contreras, Andrew Chiu
  • Patent number: 6500316
    Abstract: An apparatus for rotary cathode electroplating having a head assembly, a substrate/thief assembly having a thieving ring which includes a number of individually chargeable segments, and a secondary induction assembly including a secondary core and a secondary winding. A motor drives the substrate/thief assembly to rotate relative to the head assembly. A controller directs electrical charge to each of the individually chargeable segments of the thieving ring. An electrical storage device stores electrical energy which is to be supplied to the controller. A charging apparatus induces a magnetic flux which induces an alternating current in the secondary winding of the secondary induction assembly. A converter converts the induced alternating current to direct current, which is then stored on the electrical storage device.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: December 31, 2002
    Assignee: International Business Machines Corporation
    Inventors: Joseph J. Fatula, Jr., Robert W. Hitzfeld, Richard Contreras, Guillermo Prada-Silva, Andrew Chiu, Rainer Schieferstein
  • Patent number: 6437472
    Abstract: A magnetic induction device having at least one secondary induction assembly including a secondary winding is mounted on a rotary element. A magnetic flux is induced the secondary induction assembly, causing an induced secondary alternating current in the secondary winding of the secondary induction assembly. The secondary alternating current is converting to direct current and is stored in an electrical storage device.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: August 20, 2002
    Assignee: International Business Machines Corporation
    Inventors: Joseph J. Fatula, Jr., Robert W. Hitzfeld, Richard Contreras, Guillermo Prada-Silva, Andrew Chiu, Rainer Schieferstein
  • Patent number: 6322674
    Abstract: A cathode current control system employing a current thief for use in electroplating a wafer is set forth. The current thief comprises a plurality of conductive segments disposed to substantially surround a peripheral region of the wafer. A first plurality of resistance devices are used, each associated with a respective one of the plurality of conductive segments. The resistance devices are used to regulate current through the respective conductive finger during electroplating of the wafer. Various constructions are used for the current thief and further conductive elements, such as fingers, may also be employed in the system. As with the conductive segments, current through the fingers may also be individually controlled. In accordance with one embodiment of the overall system, selection of the resistance of each respective resistance devices is automatically controlled in accordance with predetermined programming.
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: November 27, 2001
    Assignee: Semitool, Inc.
    Inventors: Robert W. Berner, Joseph J. Fatula, Jr., Robert Hitzfeld, Richard Contreras, Andrew Chiu
  • Patent number: 6278210
    Abstract: The method and apparatus for supplying power to a rotary element by magnetic induction. A magnetic induction device having at least one secondary induction assembly including a secondary winding is mounted on the rotary element. A magnetic flux is induced the secondary induction assembly, causing an induced alternating current in the secondary winding of the secondary induction assembly. The secondary alternating current is converting to direct current and is stored in an electrical storage device. A rotary cathode plater is disclosed as a particular application of the apparatus by which power is transferred to a storage battery or high capacity capacitor, without the use of wires.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: August 21, 2001
    Assignee: International Business Machines Corporation
    Inventors: Joseph J. Fatula, Jr., Robert W. Hitzfeld, Richard Contreras, Guillermo Prada-Silva, Andrew Chiu, Rainer Schieferstein
  • Patent number: 5920762
    Abstract: A integral magnetic head and suspension and method for making the same. The integral head and suspension are fabricated completely on silicon (Si) wafers using semiconductor processes. A N+ silicon layer is disposed over a P- silicon wafer. The N+ silicon layer and the P- silicon wafer are thermally oxidized to generate a bottom silicon oxide layer opposite the N+ layer side of the wafer and a top silicon oxide layer on the N+ side of the wafer, and to drive the N+ silicon into the P- silicon wafer. A layer of polysilicon is disposed over the silicon oxide layer on top of the N+ silicon layer and is then patterned to define the head structure and suspension structure as one piece. Then, a magnetic head is disposed on the polysilicon. Finally, the magnetic head and suspension are separated from the wafer by removing the first silicon oxide layer by a chemical etchant and the P- silicon wafer by selective etching.
    Type: Grant
    Filed: August 15, 1997
    Date of Patent: July 6, 1999
    Assignee: International Business Machines Corporation
    Inventors: Randall G. Simmons, Joseph J. Fatula, Jr.
  • Patent number: 5742452
    Abstract: A integral magnetic head and suspension and method for making the same. The integral head and suspension are fabricated completely on silicon (Si) wafers using semiconductor processes. A N+ silicon layer is disposed over a P- silicon wafer. The N+ silicon layer and the P-silicon wafer are thermally oxidized to generate a bottom silicon oxide layer opposite the N+ layer side of the wafer and a top silicon oxide layer on the N+ side of the wafer, and to drive the N+ silicon into the P- silicon wafer. A layer of polysilicon is disposed over the silicon oxide layer on top of the N+ silicon layer and is then patterned to define the head structure and suspension structure as one piece. Then, a magnetic head is disposed on the polysilicon. Finally, the magnetic head and suspension are separated from the wafer by removing the first silicon oxide layer by a chemical etchant and the P- silicon wafer by selective etching.
    Type: Grant
    Filed: January 10, 1996
    Date of Patent: April 21, 1998
    Assignee: International Business Machines Corporation
    Inventors: Randall G. Simmons, Joseph J. Fatula, Jr.
  • Patent number: 4407058
    Abstract: A dielectrically isolated region of a monocrystalline substrate, which has a <100> orientation, has a drain region of a field effect transistor (FET) in a surface having a (100) crystal orientation with the drain region being of opposite conductivity to the conductivity of the substrate. A gate channel extends into the substrate from the drain region and is surrounded at its upper end by the drain region. An enlarged recess extends into the substrate beneath the gate channel and has its walls of opposite conductivity to the conductivity of the substrate to form a source region and a plate of a capacitor when the FET is part of a storage cell. The source region has its upper end surrounded by the gate channel.
    Type: Grant
    Filed: May 22, 1981
    Date of Patent: October 4, 1983
    Assignee: International Business Machines Corporation
    Inventors: Joseph J. Fatula, Jr., Paul L. Garbarino, Joseph F. Shepard
  • Patent number: 4397075
    Abstract: A dense, vertical MOS FET memory cell has a high charge storage capacitance per unit area of substrate surface. The charge storage capacitor structure is formed within a well etched in the silicon semiconductor substrate by a combination of reactive ion etching and a self-limiting wet etch.
    Type: Grant
    Filed: July 3, 1980
    Date of Patent: August 9, 1983
    Assignee: International Business Machines Corporation
    Inventors: Joseph J. Fatula, Jr., Paul L. Garbarino
  • Patent number: 4285761
    Abstract: A method of forming a refractory metal silicide pattern on a substrate by (1) forming a blanket layer of SiO.sub.2 on the substrate, (2) depositing a blanket layer of polycrystalline Si over the SiO.sub.2 layer, (3) defining a pattern in the blanket Si layer thereby exposing selected areas of the SiO.sub.2 layer, (4) depositing a blanket layer of refractory metal silicide on the substrate over the SiO.sub.2 and Si layers, (5) heating the substrate in an oxidizing environment to a temperature sufficient to oxidize the metal silicide layer over the Si to form an upper layer of SiO.sub.2 and to convert the metal silicide layer overlying the SiO.sub.2 layer to a metal rich SiO.sub.2 layer, andexposing the oxidized surface to an etchant that selectively etches away the metal rich SiO.sub.2 layer.
    Type: Grant
    Filed: June 30, 1980
    Date of Patent: August 25, 1981
    Assignee: International Business Machines Corporation
    Inventors: Joseph J. Fatula, Jr., Stanley Roberts