Patents by Inventor Joseph J. Scorsone

Joseph J. Scorsone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7508683
    Abstract: Methods and apparatus for providing electromagnetic interference (EMI) shielding for a module receiving area within a computer server housing configured to receive an input/output (IO) module are disclosed. The module receiving area is covered with a door. EMI shielding is provided by transitioning the door from a closed position to an open position in response to a force applied by the IO module, maintaining contact between the IO module and the door while the door is open to provide EMI shielding for the module receiving area when the IO module is present, and transitioning the door from the open position to the closed position in response to removal of the force applied by the IO module when the IO module is withdrawn from the module receiving area to provide EMI shielding for the module receiving area when the IO module is not present.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: March 24, 2009
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Joseph J. Scorsone
  • Patent number: 7281953
    Abstract: Methods and apparatus to configure a computer to receive cards of a first or second card type are disclosed. The computer is configured through the use of an adapter including a flexible cable having a first connector adjacent one end and a second connector adjacent the other end. The computer is configured by coupling the first connector to the computer. Also, a determination is made to receive either the first or the second card types. For a determination to receive the first card type, the flexible cable is bent in a predefined manner to orient the second connector with respect to the first connector to receive the first card type. For a determination to receive the second card type, the flexible cable is bent in another predefined manner to orient the second connector differently with respect to the first connector to receive the second card type.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: October 16, 2007
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Joseph J. Scorsone
  • Patent number: 7079386
    Abstract: A computer system is provided with a rack defining an interior. A computer chassis is mounted at least partially within the interior of the rack, wherein the computer chassis defines an interior. An interconnect assembly is mounted at least partially within the interior of the rack, wherein the interconnect assembly has an interconnect connector. A processor assembly is mounted at least partially within the interior of the computer chassis, and the processor assembly has a processor board and a processor connector mounted to the processor board and connected to the interconnect connector of the interconnect assembly. The processor assembly also has at least eight addressable processor segments mounted to the processor board.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: July 18, 2006
    Assignee: Unisys Corporation
    Inventors: Daniel A. Jochym, Christian E. Shenberger, Keith D. Mease, Joseph J. Scorsone
  • Patent number: 6870743
    Abstract: A computer module for use in a scalable computer system is provided. The computer module includes a chassis at least partially defining an interior and a processor board configured for insertion into a processor region of the interior of the chassis along an insertion axis. The processor board includes at least one connector for communicating signals to and from the processor board. The connector of the processor board is oriented along a connection axis that is substantially perpendicular to the insertion axis. The computer module also includes a memory board configured for insertion into a memory region of the interior of the chassis along the insertion axis. The memory board includes at least one connector for communicating signals to and from the memory board. The connector of the memory board is oriented along the connection axis.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: March 22, 2005
    Assignee: Unisys Corporation
    Inventors: Keith D. Mease, Sean M. McClain, Joseph J. Scorsone, Daniel A. Jochym, David H. Chase
  • Publication number: 20040184251
    Abstract: A computer module for use in a scalable computer system is provided. The computer module includes a chassis at least partially defining an interior and a processor board configured for insertion into a processor region of the interior of the chassis along an insertion axis. The processor board includes at least one connector for communicating signals to and from the processor board. The connector of the processor board is oriented along a connection axis that is substantially perpendicular to the insertion axis. The computer module also includes a memory board configured for insertion into a memory region of the interior of the chassis along the insertion axis. The memory board includes at least one connector for communicating signals to and from the memory board. The connector of the memory board is oriented along the connection axis.
    Type: Application
    Filed: March 17, 2003
    Publication date: September 23, 2004
    Inventors: Keith D. Mease, Sean M. McClain, Joseph J. Scorsone, Daniel A. Jochym, David H. Chase
  • Patent number: 5721495
    Abstract: A quiescent test circuit for interfacing a high precision integrated circuit tester to a device under test (DUT). The quiescent test circuit is capable of supplying a high powered (V1) voltage supply to a DUT while the DUT's desired dynamics internal state is reached. At this point, the integrated circuit tester, sends an active select signal to the quiescent test circuit instantaneously which deselects the high-powered (V1) voltage supply to the DUT and selects the integrated circuit tester's parametric measurement unit low power (V4) voltage supply for powering the DUT. The integrated circuit tester, through its parametric measurement unit is capable of precisely measuring the very low quiescent current of the DUT, while powering the DUT.
    Type: Grant
    Filed: October 24, 1995
    Date of Patent: February 24, 1998
    Assignee: Unisys Corporation
    Inventors: Mark W. Jennion, Joseph H. Fell III, Paul H. Selby III, Joseph J. Scorsone
  • Patent number: 5652524
    Abstract: An improved load board design having a generic test circuit integrated into the load board capable of functioning with varying devices under test and requires little to no wiring. The test circuit is located in a fixed and optimal position of the load board with relation to the DUT. In a preferred embodiment, the test circuit is a quiescent test circuit for interfacing an integrated circuit tester to the DUT. The quiescent test circuit is capable of supplying high powered voltage to a DUT while the DUT's desired internal state is reached. At this point, the integrated circuit tester, sends an active select signal to the quiescent test circuit instantaneously deselecting the high-powered voltage supply to the DUT and selecting the integrated circuit tester's parametric measurement unit for powering the DUT. The integrated circuit tester, through a parametric measurement unit is capable of measuring the quiescent current of the DUT, while powering the DUT.
    Type: Grant
    Filed: October 24, 1995
    Date of Patent: July 29, 1997
    Assignee: Unisys Corporation
    Inventors: Mark W. Jennion, Joseph H. Fell, III, Paul H. Selby, III, Joseph J. Scorsone