Abstract: The product has a power supply (P2) and a processor (P). The processor (P) has an input (PDD) for receiving a power-down signal indicating a status of the power supply (P2) and another input (Q) connected to another supply. The product also has a non-volatile memory (M) for storing data supplied by the processor (P). The processor (P) has an algorithm to detect a power-down status of the power supply (P2) by repeatedly checking the power-down signal and, upon detection that the power-down signal has a value (S0) corresponding to the power-down status, to complete an ongoing writing operation and stop the storage of data. The method prevents incorrect storage of data in a non-volatile memory by using the mentioned algorithm.