Patents by Inventor Joseph K. Ho

Joseph K. Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250065667
    Abstract: A pendulum decorating apparatus having a base, an arm coupled to the base and extending upward from the base, a tether coupled to a portion of the arm above the base, and a pot coupled to the tether. The pot is configured to contain a decorating material, and the pot is configured to swing with respect to the arm via the tether while releasing the decorating material through a discharge opening of the pot. The arm may be coupled to a tilt tray supported by the base with the arm and tilt tray configured to tilt together with respect to the base. The pot may include a container configured to contain the decorating material and a stopper movable to close or open the discharge opening of the pot. The pot may include a plurality of chambers each configured to contain a different color or type of decorating material.
    Type: Application
    Filed: August 16, 2024
    Publication date: February 27, 2025
    Inventors: ROBERT HENRY, JOSEPH MOLL, REGAN JOHNSON, CAROLINA C. O'CONNOR, LEE SOKOLOWSKI, YING K. HO
  • Patent number: 6010918
    Abstract: Field emission devices may include emitter wells formed in a body of dielectric material. A gate conductor may be provided along the upper surface of the dielectric material. A gate hole may be provided in the gate conductor directly above each of the emitter wells. A method for forming the gate holes and emitter wells is disclosed. The method includes the steps of providing a first gate conductor layer on a dielectric layer. A pattern of second gate conductor material may be formed over the first gate conductor layer, said pattern defining gate holes in the second gate conductor material. The gate holes may then be completed and emitter wells formed by etching through the first gate conductor layer and into the dielectric layer using an etch that selectively etches the first gate conductor layer and the dielectric layer, and does not etch substantially the second gate conductor material.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: January 4, 2000
    Assignee: FED Corporation
    Inventors: Jeffrey R. Marino, Joseph K. Ho
  • Patent number: 5828163
    Abstract: A field emitter device includes a column conductor, an insulator, and a resistor structure for advantageously limiting current in a field emitter array. A wide column conductor is deposited on an insulating substrate. An insulator is laid over the column conductor. A high resistance layer is placed on the insulator and is physically isolated from the column conductor. The high resistance material may be chromium oxide or 10%-50% wt % Cr+SiO. A group of microtip electron emitters is placed over the high resistance layer. A low resistance strap interconnects the column conductor with the high resistance layer to connect in an electrical series circuit the column conductor, the high resistance layer, and the group of electron emitters. One or more layers of insulator and a gate electrode, all with cavities for the electron emitters, are laid over the high resistance material. One layer of insulator is selected from a group of materials including SiC, SiO, and Si.sub.3 N.sub.4.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: October 27, 1998
    Assignee: FED Corporation
    Inventors: Gary W. Jones, Susan K. Jones, Jeffrey Marino, Joseph K. Ho, R. Mark Boysel, Steven M. Zimmerman, Yachin Liu, Michael J. Costa, Jeffrey A. Silvernail