Patents by Inventor Joseph Koston
Joseph Koston has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11960896Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.Type: GrantFiled: November 18, 2021Date of Patent: April 16, 2024Assignee: Intel CorporationInventors: Harsh Chheda, Nishanth Reddy Pendluru, Joseph Koston, Eric R. Crawford
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Publication number: 20230094002Abstract: Dynamic routing of texture-load in graphics processing is described. An example of an apparatus includes a graphics processor including a plurality of processing engines of a class of processing engines of the graphic processor; a set of queues for the plurality of processing engines; and a unified submit port for the plurality of processing engines, wherein the unified submit port is to notify a scheduler regarding availability of slots in the set of queues for receipt of workload contexts; and wherein, upon the unified submit port receiving a workload context for processing by the plurality of processing engines, the unified submit port is to detect an available processing engine of the plurality of processing engines and direct the received context to a slot of the set of queues for processing by the available processing engine.Type: ApplicationFiled: September 24, 2021Publication date: March 30, 2023Applicant: Intel CorporationInventors: Hema Chand Nalluri, Jeffery S. Boles, Joseph Koston, Ankur N. Shah, Vidhya Krishnan, Vasanth Ranganathan, Joydeep Ray, Aditya Navale, Murali Ramadoss, James Valerio
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Patent number: 11436696Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.Type: GrantFiled: June 29, 2021Date of Patent: September 6, 2022Assignee: Intel CorporationInventors: Ankur N. Shah, Nishanth Reddy Pendluru, Joseph Koston, Murali Ramadoss
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Publication number: 20220156085Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.Type: ApplicationFiled: November 18, 2021Publication date: May 19, 2022Inventors: Harsh Chheda, Nishanth Reddy Pendluru, Joseph Koston, Eric R. Crawford
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Publication number: 20210398243Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.Type: ApplicationFiled: June 29, 2021Publication date: December 23, 2021Applicant: Intel CorporationInventors: Ankur N. Shah, Nishanth Reddy Pendluru, Joseph Koston, Murali Ramadoss
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Patent number: 11200063Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.Type: GrantFiled: September 27, 2018Date of Patent: December 14, 2021Assignee: Intel CorporationInventors: Harsh Chheda, Nishanth Reddy Pendluru, Joseph Koston, Eric R. Crawford
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Patent number: 11055809Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.Type: GrantFiled: June 28, 2019Date of Patent: July 6, 2021Assignee: Intel CorporationInventors: Ankur N. Shah, Nishanth Reddy Pendluru, Joseph Koston, Murali Ramadoss
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Patent number: 10937119Abstract: An apparatus and method for virtualized scheduling. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising a plurality of graphics processing engines, each of the graphics processing engines usable to execute graphics program code for a plurality of graphics contexts, each of the graphics contexts associated with a particular user mode driver (UMD); and a scheduler to schedule the graphics program code for execution on the plurality of graphics engines, the scheduler comprising an integrated context queue to store program code from all of the graphics contexts, the scheduler to select graphics processing engines to execute the program code from each context based on a detected load and/or availability of each graphics processing engine and to determine an order for executing the program code from each context based on relative priorities associated with the different contexts.Type: GrantFiled: February 13, 2020Date of Patent: March 2, 2021Assignee: Intel CorporationInventors: Murali Ramadoss, Penne Lee, Ankur Shah, Ping Liu, Joseph Koston
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Publication number: 20200410628Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.Type: ApplicationFiled: June 28, 2019Publication date: December 31, 2020Inventors: Ankur N. Shah, Nishanth Reddy Pendluru, Joseph Koston, Murali Ramadoss
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Publication number: 20200327636Abstract: An apparatus and method for virtualized scheduling. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising a plurality of graphics processing engines, each of the graphics processing engines usable to execute graphics program code for a plurality of graphics contexts, each of the graphics contexts associated with a particular user mode driver (UMD); and a scheduler to schedule the graphics program code for execution on the plurality of graphics engines, the scheduler comprising an integrated context queue to store program code from all of the graphics contexts, the scheduler to select graphics processing engines to execute the program code from each context based on a detected load and/or availability of each graphics processing engine and to determine an order for executing the program code from each context based on relative priorities associated with the different contexts.Type: ApplicationFiled: February 13, 2020Publication date: October 15, 2020Applicant: Intel CorporationInventors: MURALI RAMADOSS, PENNE LEE, ANKUR SHAH, PING LIU, JOSEPH KOSTON
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Patent number: 10796472Abstract: Apparatus and method for simultaneous command streamers. For example, one embodiment of an apparatus comprises: a plurality of work element queues to store work elements for a plurality of thread contexts, each work element associated with a context descriptor identifying a context storage region in memory; a plurality of command streamers, each command streamer associated with one of the plurality of work element queues, the command streamers to independently submit instructions for execution as specified by the work elements; a thread dispatcher to evaluate the thread contexts including priority values, to tag each instruction with an execution identifier (ID), and to responsively dispatch each instruction including the execution ID in accordance with the thread context; and a plurality of graphics functional units to independently execute each instruction dispatched by the thread dispatcher and to associate each instruction with a thread context based on its execution ID.Type: GrantFiled: June 30, 2018Date of Patent: October 6, 2020Assignee: Intel CorporationInventors: Michael Apodaca, Ankur Shah, Ben Ashbaugh, Brandon Fliflet, Hema Nalluri, Pattabhiraman K, Peter Doyle, Joseph Koston, James Valerio, Murali Ramadoss, Altug Koker, Aditya Navale, Prasoonkumar Surti, Balaji Vembu
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Publication number: 20200104138Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.Type: ApplicationFiled: September 27, 2018Publication date: April 2, 2020Inventors: Harsh Chheda, Nishanth Reddy Pendluru, Joseph Koston, Eric R. Crawford
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Patent number: 10565673Abstract: An apparatus and method for virtualized scheduling. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising a plurality of graphics processing engines, each of the graphics processing engines usable to execute graphics program code for a plurality of graphics contexts, each of the graphics contexts associated with a particular user mode driver (UMD); and a scheduler to schedule the graphics program code for execution on the plurality of graphics engines, the scheduler comprising an integrated context queue to store program code from all of the graphics contexts, the scheduler to select graphics processing engines to execute the program code from each context based on a detected load and/or availability of each graphics processing engine and to determine an order for executing the program code from each context based on relative priorities associated with the different contexts.Type: GrantFiled: March 15, 2018Date of Patent: February 18, 2020Assignee: Intel CorporationInventors: Murali Ramadoss, Penne Lee, Ankur Shah, Ping Liu, Joseph Koston
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Publication number: 20200005516Abstract: Apparatus and method for simultaneous command streamers. For example, one embodiment of an apparatus comprises: a plurality of work element queues to store work elements for a plurality of thread contexts, each work element associated with a context descriptor identifying a context storage region in memory; a plurality of command streamers, each command streamer associated with one of the plurality of work element queues, the command streamers to independently submit instructions for execution as specified by the work elements; a thread dispatcher to evaluate the thread contexts including priority values, to tag each instruction with an execution identifier (ID), and to responsively dispatch each instruction including the execution ID in accordance with the thread context; and a plurality of graphics functional units to independently execute each instruction dispatched by the thread dispatcher and to associate each instruction with a thread context based on its execution ID.Type: ApplicationFiled: June 30, 2018Publication date: January 2, 2020Inventors: MICHAEL APODACA, ANKUR SHAH, BEN ASHBAUGH, BRANDON FLIFLET, HEMA NALLURI, PATTABHIRAMAN K, PETER DOYLE, JOSEPH KOSTON, JAMES VALERIO, MURALI RAMADOSS, ALTUG KOKER, ADITYA NAVALE, PRASOONKUMAR SURTI, BALAJI VEMBU
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Patent number: 10424043Abstract: Graphics processing systems and methods are described. A graphics processing apparatus may comprise one or more graphics processing cores, a shared buffer accessible to a user mode driver (UMD) associated with an application in an unprivileged domain, the UMD to write one or more commands to the shared buffer, and a controller parse a workload in the shared buffer to identify one or more commands in the workload, the workload added by the application executing in the unprivileged domain, associate a trigger with a command in the workload, transfer the workload to one or more components of the graphics processing apparatus for execution, and upon execution of the command associated with the trigger, sample the shared buffer to identify a new workload added to the shared buffer. The one or more components of the graphics processing apparatus automatically execute the new workload added to the shared buffer.Type: GrantFiled: July 2, 2018Date of Patent: September 24, 2019Assignee: Intel CorporationInventors: Joseph Koston, Ankur Shah, Murali Ramadoss, Jeffery Boles, Balaji Vembu
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Publication number: 20190287205Abstract: An apparatus and method for virtualized scheduling. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising a plurality of graphics processing engines, each of the graphics processing engines usable to execute graphics program code for a plurality of graphics contexts, each of the graphics contexts associated with a particular user mode driver (UMD); and a scheduler to schedule the graphics program code for execution on the plurality of graphics engines, the scheduler comprising an integrated context queue to store program code from all of the graphics contexts, the scheduler to select graphics processing engines to execute the program code from each context based on a detected load and/or availability of each graphics processing engine and to determine an order for executing the program code from each context based on relative priorities associated with the different contexts.Type: ApplicationFiled: March 15, 2018Publication date: September 19, 2019Inventors: MURALI RAMADOSS, PENNE LEE, ANKUR SHAH, PING LIU, JOSEPH KOSTON
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Patent number: 10410311Abstract: Embodiments provide for an apparatus comprising a graphics processing subsystem including one or more graphics engines and a graphics scheduler to schedule a submission queue of multiple work items for execution on the one or more graphics engines of the graphics processing subsystem. The graphics scheduler can be configured to build the submission queue via a write to a memory mapped address that is mapped to logic within the graphics processing subsystem and to explicitly submit the submission queue to the graphics engine after the build of the submission queue.Type: GrantFiled: March 7, 2016Date of Patent: September 10, 2019Assignee: INTEL CORPORATIONInventors: Balaji Vembu, Kritika Bala, Murali Ramadoss, Hema Nalluri, Jeffery Boles, Jeffrey Frizzell, Joseph Koston
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Publication number: 20170256019Abstract: Embodiments provide for an apparatus comprising a graphics processing subsystem including one or more graphics engines and a graphics scheduler to schedule a submission queue of multiple work items for execution on the one or more graphics engines of the graphics processing subsystem. The graphics scheduler can be configured to build the submission queue via a write to a memory mapped address that is mapped to logic within the graphics processing subsystem and to explicitly submit the submission queue to the graphics engine after the build of the submission queue.Type: ApplicationFiled: March 7, 2016Publication date: September 7, 2017Applicant: Intel CorporationInventors: Balaji Vembu, Kritika Bala, Murali Ramadoss, Hema Nalluri, Jeffery Boles, Jeffrey Frizzell, Joseph Koston