Patents by Inventor Joseph Koston

Joseph Koston has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960896
    Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: April 16, 2024
    Assignee: Intel Corporation
    Inventors: Harsh Chheda, Nishanth Reddy Pendluru, Joseph Koston, Eric R. Crawford
  • Publication number: 20230094002
    Abstract: Dynamic routing of texture-load in graphics processing is described. An example of an apparatus includes a graphics processor including a plurality of processing engines of a class of processing engines of the graphic processor; a set of queues for the plurality of processing engines; and a unified submit port for the plurality of processing engines, wherein the unified submit port is to notify a scheduler regarding availability of slots in the set of queues for receipt of workload contexts; and wherein, upon the unified submit port receiving a workload context for processing by the plurality of processing engines, the unified submit port is to detect an available processing engine of the plurality of processing engines and direct the received context to a slot of the set of queues for processing by the available processing engine.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Applicant: Intel Corporation
    Inventors: Hema Chand Nalluri, Jeffery S. Boles, Joseph Koston, Ankur N. Shah, Vidhya Krishnan, Vasanth Ranganathan, Joydeep Ray, Aditya Navale, Murali Ramadoss, James Valerio
  • Patent number: 11436696
    Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: September 6, 2022
    Assignee: Intel Corporation
    Inventors: Ankur N. Shah, Nishanth Reddy Pendluru, Joseph Koston, Murali Ramadoss
  • Publication number: 20220156085
    Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.
    Type: Application
    Filed: November 18, 2021
    Publication date: May 19, 2022
    Inventors: Harsh Chheda, Nishanth Reddy Pendluru, Joseph Koston, Eric R. Crawford
  • Publication number: 20210398243
    Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 23, 2021
    Applicant: Intel Corporation
    Inventors: Ankur N. Shah, Nishanth Reddy Pendluru, Joseph Koston, Murali Ramadoss
  • Patent number: 11200063
    Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: December 14, 2021
    Assignee: Intel Corporation
    Inventors: Harsh Chheda, Nishanth Reddy Pendluru, Joseph Koston, Eric R. Crawford
  • Patent number: 11055809
    Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventors: Ankur N. Shah, Nishanth Reddy Pendluru, Joseph Koston, Murali Ramadoss
  • Patent number: 10937119
    Abstract: An apparatus and method for virtualized scheduling. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising a plurality of graphics processing engines, each of the graphics processing engines usable to execute graphics program code for a plurality of graphics contexts, each of the graphics contexts associated with a particular user mode driver (UMD); and a scheduler to schedule the graphics program code for execution on the plurality of graphics engines, the scheduler comprising an integrated context queue to store program code from all of the graphics contexts, the scheduler to select graphics processing engines to execute the program code from each context based on a detected load and/or availability of each graphics processing engine and to determine an order for executing the program code from each context based on relative priorities associated with the different contexts.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Murali Ramadoss, Penne Lee, Ankur Shah, Ping Liu, Joseph Koston
  • Publication number: 20200410628
    Abstract: An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.
    Type: Application
    Filed: June 28, 2019
    Publication date: December 31, 2020
    Inventors: Ankur N. Shah, Nishanth Reddy Pendluru, Joseph Koston, Murali Ramadoss
  • Publication number: 20200327636
    Abstract: An apparatus and method for virtualized scheduling. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising a plurality of graphics processing engines, each of the graphics processing engines usable to execute graphics program code for a plurality of graphics contexts, each of the graphics contexts associated with a particular user mode driver (UMD); and a scheduler to schedule the graphics program code for execution on the plurality of graphics engines, the scheduler comprising an integrated context queue to store program code from all of the graphics contexts, the scheduler to select graphics processing engines to execute the program code from each context based on a detected load and/or availability of each graphics processing engine and to determine an order for executing the program code from each context based on relative priorities associated with the different contexts.
    Type: Application
    Filed: February 13, 2020
    Publication date: October 15, 2020
    Applicant: Intel Corporation
    Inventors: MURALI RAMADOSS, PENNE LEE, ANKUR SHAH, PING LIU, JOSEPH KOSTON
  • Patent number: 10796472
    Abstract: Apparatus and method for simultaneous command streamers. For example, one embodiment of an apparatus comprises: a plurality of work element queues to store work elements for a plurality of thread contexts, each work element associated with a context descriptor identifying a context storage region in memory; a plurality of command streamers, each command streamer associated with one of the plurality of work element queues, the command streamers to independently submit instructions for execution as specified by the work elements; a thread dispatcher to evaluate the thread contexts including priority values, to tag each instruction with an execution identifier (ID), and to responsively dispatch each instruction including the execution ID in accordance with the thread context; and a plurality of graphics functional units to independently execute each instruction dispatched by the thread dispatcher and to associate each instruction with a thread context based on its execution ID.
    Type: Grant
    Filed: June 30, 2018
    Date of Patent: October 6, 2020
    Assignee: Intel Corporation
    Inventors: Michael Apodaca, Ankur Shah, Ben Ashbaugh, Brandon Fliflet, Hema Nalluri, Pattabhiraman K, Peter Doyle, Joseph Koston, James Valerio, Murali Ramadoss, Altug Koker, Aditya Navale, Prasoonkumar Surti, Balaji Vembu
  • Publication number: 20200104138
    Abstract: Methods, systems and apparatuses may provide for technology that triggers an idle state in a first command streamer in response to a request to reset a second command streamer that shares graphics hardware with the first command streamer. The technology may also determine an event type associated with the request and conduct the request based on the event type.
    Type: Application
    Filed: September 27, 2018
    Publication date: April 2, 2020
    Inventors: Harsh Chheda, Nishanth Reddy Pendluru, Joseph Koston, Eric R. Crawford
  • Patent number: 10565673
    Abstract: An apparatus and method for virtualized scheduling. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising a plurality of graphics processing engines, each of the graphics processing engines usable to execute graphics program code for a plurality of graphics contexts, each of the graphics contexts associated with a particular user mode driver (UMD); and a scheduler to schedule the graphics program code for execution on the plurality of graphics engines, the scheduler comprising an integrated context queue to store program code from all of the graphics contexts, the scheduler to select graphics processing engines to execute the program code from each context based on a detected load and/or availability of each graphics processing engine and to determine an order for executing the program code from each context based on relative priorities associated with the different contexts.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: February 18, 2020
    Assignee: Intel Corporation
    Inventors: Murali Ramadoss, Penne Lee, Ankur Shah, Ping Liu, Joseph Koston
  • Publication number: 20200005516
    Abstract: Apparatus and method for simultaneous command streamers. For example, one embodiment of an apparatus comprises: a plurality of work element queues to store work elements for a plurality of thread contexts, each work element associated with a context descriptor identifying a context storage region in memory; a plurality of command streamers, each command streamer associated with one of the plurality of work element queues, the command streamers to independently submit instructions for execution as specified by the work elements; a thread dispatcher to evaluate the thread contexts including priority values, to tag each instruction with an execution identifier (ID), and to responsively dispatch each instruction including the execution ID in accordance with the thread context; and a plurality of graphics functional units to independently execute each instruction dispatched by the thread dispatcher and to associate each instruction with a thread context based on its execution ID.
    Type: Application
    Filed: June 30, 2018
    Publication date: January 2, 2020
    Inventors: MICHAEL APODACA, ANKUR SHAH, BEN ASHBAUGH, BRANDON FLIFLET, HEMA NALLURI, PATTABHIRAMAN K, PETER DOYLE, JOSEPH KOSTON, JAMES VALERIO, MURALI RAMADOSS, ALTUG KOKER, ADITYA NAVALE, PRASOONKUMAR SURTI, BALAJI VEMBU
  • Patent number: 10424043
    Abstract: Graphics processing systems and methods are described. A graphics processing apparatus may comprise one or more graphics processing cores, a shared buffer accessible to a user mode driver (UMD) associated with an application in an unprivileged domain, the UMD to write one or more commands to the shared buffer, and a controller parse a workload in the shared buffer to identify one or more commands in the workload, the workload added by the application executing in the unprivileged domain, associate a trigger with a command in the workload, transfer the workload to one or more components of the graphics processing apparatus for execution, and upon execution of the command associated with the trigger, sample the shared buffer to identify a new workload added to the shared buffer. The one or more components of the graphics processing apparatus automatically execute the new workload added to the shared buffer.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: September 24, 2019
    Assignee: Intel Corporation
    Inventors: Joseph Koston, Ankur Shah, Murali Ramadoss, Jeffery Boles, Balaji Vembu
  • Publication number: 20190287205
    Abstract: An apparatus and method for virtualized scheduling. For example, one embodiment of a graphics processing apparatus comprises: a graphics processor comprising a plurality of graphics processing engines, each of the graphics processing engines usable to execute graphics program code for a plurality of graphics contexts, each of the graphics contexts associated with a particular user mode driver (UMD); and a scheduler to schedule the graphics program code for execution on the plurality of graphics engines, the scheduler comprising an integrated context queue to store program code from all of the graphics contexts, the scheduler to select graphics processing engines to execute the program code from each context based on a detected load and/or availability of each graphics processing engine and to determine an order for executing the program code from each context based on relative priorities associated with the different contexts.
    Type: Application
    Filed: March 15, 2018
    Publication date: September 19, 2019
    Inventors: MURALI RAMADOSS, PENNE LEE, ANKUR SHAH, PING LIU, JOSEPH KOSTON
  • Patent number: 10410311
    Abstract: Embodiments provide for an apparatus comprising a graphics processing subsystem including one or more graphics engines and a graphics scheduler to schedule a submission queue of multiple work items for execution on the one or more graphics engines of the graphics processing subsystem. The graphics scheduler can be configured to build the submission queue via a write to a memory mapped address that is mapped to logic within the graphics processing subsystem and to explicitly submit the submission queue to the graphics engine after the build of the submission queue.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: September 10, 2019
    Assignee: INTEL CORPORATION
    Inventors: Balaji Vembu, Kritika Bala, Murali Ramadoss, Hema Nalluri, Jeffery Boles, Jeffrey Frizzell, Joseph Koston
  • Publication number: 20170256019
    Abstract: Embodiments provide for an apparatus comprising a graphics processing subsystem including one or more graphics engines and a graphics scheduler to schedule a submission queue of multiple work items for execution on the one or more graphics engines of the graphics processing subsystem. The graphics scheduler can be configured to build the submission queue via a write to a memory mapped address that is mapped to logic within the graphics processing subsystem and to explicitly submit the submission queue to the graphics engine after the build of the submission queue.
    Type: Application
    Filed: March 7, 2016
    Publication date: September 7, 2017
    Applicant: Intel Corporation
    Inventors: Balaji Vembu, Kritika Bala, Murali Ramadoss, Hema Nalluri, Jeffery Boles, Jeffrey Frizzell, Joseph Koston