Patents by Inventor Joseph Kramer
Joseph Kramer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240108929Abstract: In one implementation, a computer-implemented method includes receiving, at a computer system, information that indicates that a fire has been detected in a building and that a fire suppression system within the building has begun dousing the fire; monitoring sensor information from one or more sensors located within the building; determining, by the computer system and based on the sensor information, whether the fire has been extinguished; activating, in response to determining that the fire has been extinguished, a feature to turn off a water supply to the building, the feature being presented on a computing device for a user who is associated with the building; receiving, after activating the feature and from the computing device, a command to turn off the water supply; and transmitting, by the computer system, a control signal that causes an electromechanical device to close a water valve within the building.Type: ApplicationFiled: October 19, 2023Publication date: April 4, 2024Inventors: Joseph Schmitt, Michael Kramer, Ronak Desai, Randall Kurtz
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Patent number: 11436398Abstract: A method of simulating quantum gates includes shifting a Fock basis for the simulation such that the simulation can be performed in a smaller (e.g. truncated) Hilbert dimension space. To shift the Fock basis, non-orthonormalized basis states are first defined. The defined basis states are then orthonormalized to construct orthonormalized shifted Fock basis state. Matrix elements are determined for an operator in the orthonormalized shifted Fock basis and the operator is used to simulate the quantum gate in the shifted Fock basis.Type: GrantFiled: November 13, 2020Date of Patent: September 6, 2022Assignee: Amazon Technologies, Inc.Inventors: Kyungjoo Noh, Joseph Kramer Iverson, Connor Hann
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Publication number: 20220156444Abstract: A method of simulating quantum gates includes shifting a Fock basis for the simulation such that the simulation can be performed in a smaller (e.g. truncated) Hilbert dimension space. To shift the Fock basis, non-orthonormalized basis states are first defined. The defined basis states are then orthonormalized to construct orthonormalized shifted Fock basis state. Matrix elements are determined for an operator in the orthonormalized shifted Fock basis and the operator is used to simulate the quantum gate in the shifted Fock basis.Type: ApplicationFiled: November 13, 2020Publication date: May 19, 2022Applicant: Amazon Technologies, Inc.Inventors: Kyungjoo Noh, Joseph Kramer Iverson, Connor Hann
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Publication number: 20220156621Abstract: A fault tolerant quantum computer is implemented using hybrid acoustic-electric qubits. A control circuit includes an asymmetrically threaded superconducting quantum interference devices (ATS) that excites excite phonons in a mechanical resonator by driving a storage mode of the mechanical resonator and dissipates phonons from the mechanical resonator via an open transmission line coupled to the control circuit, wherein the open transmission line is configured to absorb photons from a dump mode of the control circuit.Type: ApplicationFiled: November 13, 2020Publication date: May 19, 2022Applicant: Amazon Technologies, Inc.Inventors: Patricio Arrangoiz Arriola, Amir Safavi-Naeini, Oskar Jon Painter, Connor Hann, Fernando Brandao, Kyungjoo Noh, Joseph Kramer Iverson, Harald Esko Jakob Putterman, Christopher Chamberland, Earl Campbell
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Patent number: 11321627Abstract: A fault tolerant quantum computer is implemented using hybrid acoustic-electric qubits. A control circuit includes an asymmetrically threaded superconducting quantum interference devices (ATS) that excites excite phonons in a mechanical resonator by driving a storage mode of the mechanical resonator and dissipates phonons from the mechanical resonator via an open transmission line coupled to the control circuit, wherein the open transmission line is configured to absorb photons from a dump mode of the control circuit.Type: GrantFiled: November 13, 2020Date of Patent: May 3, 2022Assignee: Amazon Technologies, Inc.Inventors: Patricio Arrangoiz Arriola, Amir Safavi-Naeini, Oskar Jon Painter, Connor Hann, Fernando Brandao, Kyungjoo Noh, Joseph Kramer Iverson, Harald Esko Jakob Putterman, Christopher Chamberland, Earl Campbell
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Patent number: 10775833Abstract: Clock generation for capturing a repetitive signal relative to a clock includes clock circuitry to provide a clock with active and inactive clock edges within a clock period, and signal capture circuitry to capture repetitive signal transitions at an active clock edge, based on pre-defined setup and hold times which determine a setup/hold window. Clock phase adjustment circuitry is configured to adjust clock phase so that the repetitive signal transitions occur within a signal capture window between setup/hold windows. Clock phase adjustment can be based on: aligning the clock inactive edges to the repetitive signal transitions; and/or averaging successive phase comparisons of the clock and the repetitive signal transitions; and/or selectively performing an initial polarity inversion to generate a polarity inverted clock, and then adjusting clock phase of the polarity inverted clock. An example implementation is JESD204B (subclass1) to adjust DEVCLK phase relative to a SYSREF timing reference control signal.Type: GrantFiled: March 4, 2018Date of Patent: September 15, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Paul Joseph Kramer, Matthew Hansen Childs, Robert Callaghan Taft
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Publication number: 20180253122Abstract: Clock generation for capturing a repetitive signal relative to a clock includes clock circuitry to provide a clock with active and inactive clock edges within a clock period, and signal capture circuitry to capture repetitive signal transitions at an active clock edge, based on pre-defined setup and hold times which determine a setup/hold window. Clock phase adjustment circuitry is configured to adjust clock phase so that the repetitive signal transitions occur within a signal capture window between setup/hold windows. Clock phase adjustment can be based on: aligning the clock inactive edges to the repetitive signal transitions; and/or averaging successive phase comparisons of the clock and the repetitive signal transitions; and/or selectively performing an initial polarity inversion to generate a polarity inverted clock, and then adjusting clock phase of the polarity inverted clock. An example implementation is JESD204B (subclass1) to adjust DEVCLK phase relative to a SYSREF timing reference control signal.Type: ApplicationFiled: March 4, 2018Publication date: September 6, 2018Inventors: Paul Joseph Kramer, Matthew Hansen Childs, Robert Callaghan Taft
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Patent number: 9257776Abstract: A pop-up enclosure system (30) for electronic equipment, includes a receptacle (31) adapted for mounting in a work-surface (15) and containing one or more electrical outlets (32) for connection of equipment thereto, and a bezel (33) supported by the receptacle and adapted for countersinking in said work-surface. A top plate (34) is dimensioned for closing an opening defined by the bezel, and a hinge (35) is mounted at an edge of the top plate and the bezel for hingedly attaching the top plate to the bezel so as to allow rotation of the top plate from a closed position to a fully open position wherein the edge of the top plate abuts an upper surface of the bezel. A releasable resilient opening force (37) is fixed to the receptacle and articulated to the top plate for opening the top plate.Type: GrantFiled: January 20, 2013Date of Patent: February 9, 2016Assignee: KRAMER ELECTRONICS LTD.Inventor: Joseph Kramer
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Patent number: 8991129Abstract: A tile assembly having a plurality of tiles adapted to join in an interlocking and repeating fashion. A plurality of tile assemblies are joined to each other, forming a roof with a streamlined look. Each tile assembly includes left and right center tiles laterally spaced along matching edges. The tile assembly includes upper and lower tiles of the same configuration as the center tiles, fitting over and under, respectively, the center tiles. Each tile has repeating patterns laterally spaced to each other and contiguous along matching lateral extents. Each pattern consists of a generally diamond shaped main surface with vertically spaced apices and laterally spaced apices. Two upper flanges extend upwardly and outwardly each pattern's main surface, along the upper edges, joining in an upper flange apex. Two lower flanges extend downwardly and outwardly from each pattern's main surface, along the lower edges, joining in a lower flange apex.Type: GrantFiled: March 9, 2014Date of Patent: March 31, 2015Inventor: Kurt Joseph Kramer
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Publication number: 20150008805Abstract: A pop-up enclosure system (30) for electronic equipment, includes a receptacle (31) adapted for mounting in a work-surface (15) and containing one or more electrical outlets (32) for connection of equipment thereto, and a bezel (33) supported by the receptacle and adapted for countersinking in said work-surface. A top plate (34) is dimensioned for closing an opening defined by the bezel, and a hinge (35) is mounted at an edge of the top plate and the bezel for hingedly attaching the top plate to the bezel so as to allow rotation of the top plate from a closed position to a fully open position wherein the edge of the top plate abuts an upper surface of the bezel. A releasable resilient opening force (37) is fixed to the receptacle and articulated to the top plate for opening the top plate.Type: ApplicationFiled: January 20, 2013Publication date: January 8, 2015Applicant: Kramer Electronics Ltd.Inventor: Joseph Kramer
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Patent number: 8720657Abstract: A rewindable electrical cable extension device includes a housing having first and second exit ports, and a cable having first and second ends defining opposing extremities of first and second contiguous cable sections having a common junction anchored to a rotating spool. The first end protrudes through the first exit port, and the second end is fixedly mounted in association with the second exit port. The first cable section is wound on a spool that is configured to rotate within the housing. The second cable section is wound in an opposite direction to the first section so that pulling on the first end unwinds and extracts the first cable section from the housing and uncoils the second cable section within the housing without rotating the second end of the cable.Type: GrantFiled: April 30, 2012Date of Patent: May 13, 2014Assignee: Kramer Electronics, Ltd.Inventors: Joseph Kramer, Felix Roif
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Publication number: 20130287234Abstract: A ceiling speaker mountable in a ceiling tile for mounting in a suspended ceiling of a room, includes a central woofer, and at least four surrounding pivoting tweeters that are independently adjustable so as to provide broad flat coverage throughout the room. A crossover network directs low frequency signals to the woofer and high frequency signals to the tweeters and an optional stereo separator circuit directs left and right signals to different pairs of the tweeters. A method for adjusting sound dispersion produced by the ceiling speaker is also disclosed.Type: ApplicationFiled: April 25, 2012Publication date: October 31, 2013Applicant: KRAMER ELECTRONICS LTD.Inventor: Joseph Kramer
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Publication number: 20130280187Abstract: A method of improving the appearance of facial pores is provided. The method includes the step of applying a composition having an effective amount of carob fruit extract to an area of facial pores, wherein the composition is applied for a period of time sufficient for the material to improve the appearance of the facial pores. The method may also include the step of identifying facial pores on a facial skin surface.Type: ApplicationFiled: April 16, 2013Publication date: October 24, 2013Applicant: The Procter & Gamble CompanyInventors: Rosemarie NMN OSBORNE, Lisa Ann MULLINS, Gregory Joseph KRAMER
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Publication number: 20120312651Abstract: A rewindable electrical cable extension device includes a housing having first and second exit ports, and a cable having first and second ends defining opposing extremities of first and second contiguous cable sections having a common junction anchored to a rotating spool. The first end protrudes through the first exit port, and the second end is fixedly mounted in association with the second exit port. The first cable section is wound on a spool that is configured to rotate within the housing. The second cable section is wound in an opposite direction to the first section so that pulling on the first end unwinds and extracts the first cable section from the housing and uncoils the second cable section within the housing without rotating the second end of the cable.Type: ApplicationFiled: April 30, 2012Publication date: December 13, 2012Applicant: Kramer Electronics Ltd.Inventors: Joseph Kramer, Felix Roif
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Publication number: 20120069244Abstract: In a method and circuit for recovering a sync signal from an input sync signal passing through a cable to a display device, an average value of the input sync signal is obtained during a predetermined time period so as to obtain a sync threshold, which is compared with the input sync signal. A sync signal is output when the input sync signal is greater than the sync threshold.Type: ApplicationFiled: May 16, 2010Publication date: March 22, 2012Inventor: Joseph Kramer
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Patent number: 7133483Abstract: The invention produces an output signal that maintains a substantially constant period corresponding to a clock signal. An input signal includes a period that is an integer multiple of the period of the clock signal. The timing or phase of the input signal may shift in comparison to the clock signal resulting in jitter. The invention detects and cancels the jitter by varying a delay between the input signal and the output signal. The delay corresponds to an integer multiple of the period of the clock signal such that a substantially constant period is maintained for the output signal. Alternatively, the intended period for the output signal may be adjusted to match a new period when a determination is made that a sufficient difference exists between the new period of the input signal and the intended period.Type: GrantFiled: September 24, 2002Date of Patent: November 7, 2006Assignee: National Semiconductor CorporationInventors: Paul Joseph Kramer, Jered Michael Sandner
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Publication number: 20060074232Abstract: The present invention is generally directed to Matrimony (Mtrm) nucleotide sequences, polypeptides expressed from the nucleotide sequences and methods employing the Mtrm nucleotide and polypeptide sequences. The Mtrm nucleotide sequences of the invention express a dosage dependent polypeptide that mediates achiasmate chromosome disjunction. In particular, reduction in the amount of the Mtrm polypeptide will cause nondisjunction in the achiasmate chromosomes.Type: ApplicationFiled: October 4, 2004Publication date: April 6, 2006Inventors: R. Hawley, Youbin Xiang, Joseph Kramer, David Harris
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Publication number: 20050288990Abstract: Under the present invention information corresponding to a purchase decision is qualitatively collected (e.g., through in-depth interviews) from a first set of consumers. The information is used to determine the complete set of elements that impact the purchase decision. Thereafter, a process map is developed that incorporates the elements and the decision stages in the consumer decision process. The set of elements is then quantitatively validated based on survey data received from a second, bigger set of consumers. If the set of elements are validated, they will be mapped to the set of decision stages based on the survey data, and assigned impact scores. Based on the mapping and the scores, a global map that models the consumer decision process is developed.Type: ApplicationFiled: June 24, 2004Publication date: December 29, 2005Applicant: International Business Machines CorporationInventors: Steven Ballou, Todd Gurley, Jason Hill, Joseph Kramer, Richard Maltsbarger, Sunil Noronha
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Patent number: 6751282Abstract: A method and apparatus are arranged to provide a multi-bit digital signal that represents a normalized percentage of time that a signal is active. The apparatus includes an N-bit counter that is periodically reset to an initialization condition, and a logic block that processes the output of the N-bit counter. The N-bit counter is arranged to evaluate a monitored signal for each cycle of a clock signal, and modify the count accordingly. The logic block is configured to periodically scan the output of the N-bit counter after the expiration of a sampling time interval. The sampling time interval is determined by a timing circuit such as a window counter that is operated from the clock signal. The logic block periodically evaluates the output of the N-bit counter and provides the normalized multi-bit digital signal.Type: GrantFiled: March 13, 2003Date of Patent: June 15, 2004Assignee: National Semiconductor CorporationInventors: Paul Joseph Kramer, Jered Michael Sandner, Ohad Falik
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Patent number: 6667638Abstract: A frequency divider circuit utilizes an asynchronous slip request signal to provide an output clock signal according to a programmable divide ratio “R”. A high frequency input clock signal has a frequency divided by a first factor to produce a divided signal when a slip signal is inactive. The output clock signal is produced by functionally dividing the frequency of the divided signal by a second factor. The second factor is determined by the programmable divide ratio divided by the first factor such that the frequency of the output clock signal is related to the frequency of the input clock signal and the programmable divide ratio. An asynchronous slip request signal is generated when the programmable divide ratio is a non-multiple of the first factor. The asynchronous slip request signal activates the slip signal such that a transition of the divided signal is skipped.Type: GrantFiled: September 20, 2002Date of Patent: December 23, 2003Assignee: National Semiconductor CorporationInventors: Paul Joseph Kramer, Jered Michael Sandner