Abstract: An apparatus and method for virtual current sensing in a DC-DC switched mode power supply. In a fixed frequency implementation, when a switching phase begins, the phase node goes high when the high-side switching transistor is turned on. At this point, a first programmable current source begins charging a current sensing capacitor and the voltage across the capacitor simulates the rising slope of the voltage across a conventional current sensing resistor. Simultaneously, a ramp capacitor beginning at a reference voltage is charged by a second programmable current source. When the sum of the voltages across the two capacitors exceeds an error voltage, the phase node goes low when the drive signal to the transistor is turned off. At this point, a third programmable current source begins discharging the current sensing capacitor and the voltage across the capacitor simulates the falling slope of the current across the conventional resistor.