Patents by Inventor Joseph M. Morabito

Joseph M. Morabito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Fabrication of thin film resistors and capacitors
    Patent number: 4385966
    Abstract: Disclosed is a method for fabricating a circuit including thin film resistors (15) and capacitors (12, 13, 14, 16) on a single substrate whereby stabilization is effected after all such components are completely formed. A high pressure steam atmosphere is utilized for stabilization so that the resistors can be stabilized at lower temperatures and/or times and the capacitors are not degraded.
    Type: Grant
    Filed: October 7, 1980
    Date of Patent: May 31, 1983
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Harry N. Keller, Joseph M. Morabito, Raymond C. Pitetti
  • Fabrication of circuit packages
    Patent number: 4352449
    Abstract: A method of fabricating circuit packages which employ macro-components (10) mounted on supporting substrates (20). In order to maintain sufficient clearance between the component and substrate and achieve high reliability bonds, massive solder preforms (16) are applied to contact pads on either the component or substrate. After contact pads of both carrier and substrate are brought into contact with the spheres, the bond is formed.
    Type: Grant
    Filed: December 26, 1979
    Date of Patent: October 5, 1982
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Peter M. Hall, Frank L. Howland, Joseph M. Morabito, Lawrence J. Rickabaugh
  • Monolithic hybrid integrated circuits
    Patent number: 4344223
    Abstract: A method of fabricating a thin film semiconductor hybrid circuit is disclosed. After processing of the integrated circuit in the semiconductor wafer up to the point of establishing ohmic contacts (14) to devices (13), a thin film RC circuit is fabricated on an insulating layer (11,12) overlying the wafer. This is accomplished by first forming the capacitor anodes (15') on the insulator by depositing and etching a layer such as alpha tantalum. Resistors (16) are then formed by depositing and etching a layer such as tantalum nitride. Portions of the capacitor anodes are then anodized using an appropriate mask (17) to form the capacitor dielectric. Capacitor counterelectrodes (20') and interconnect conductors (20'") are formed by depositing and etching successive layers of metal such as nickel-chromium and gold. After all thin film components are formed, the resistors and capacitors are stabilized by heating the circuit in an atmosphere comprising high pressure steam.
    Type: Grant
    Filed: November 26, 1980
    Date of Patent: August 17, 1982
    Assignees: Western Electric Company, Inc., Bell Telephone Laboratories, Incorporated
    Inventors: Gary A. Bulger, Lyle D. Heck, Robert D. Huttemann, Joseph M. Morabito, Raymond C. Pitetti, Burton A. Unger, Donald J. Vallere
  • Electronic component including soldered electrical leads
    Patent number: H498
    Abstract: Disclosed is an electronic component which includes soldered leads (30 and 31) for electrical connection to other components. The electronic component is typically a film or hybrid integrated circuit formed on an insulating substrate (10) which includes contact pads (20-23) on the periphery. Clip-on type leads (30 and 31) are soldered to these pads. The leads include a thin layer of nickel (36) formed at least in the jaw (32) of the clip-on lead to prevent the formation of brittle intermetallics by the interaction of solder components with the lead components.
    Type: Grant
    Filed: August 31, 1984
    Date of Patent: July 5, 1988
    Inventors: Harry N. Keller, Joseph M. Morabito