Abstract: A memory apparatus comprising a pathway for conducting electrical energy; a plurality of even number of inverters, each inverter having an input and an output, the inverters being arranged along the pathway such that electrical energy from the output of an inverter is directed into the input of an adjacent inverter; a plurality of nodes coupling the inverters in series to form a closed loop to permit stable storage of a memory state by allowing the inverters to dissipate an amount of transient energy from a level that otherwise would result in a failure to below that level in order to maintain a stable memory state.

Abstract: A process for locating common electrode shorts in an electronic array, such as an x- y- addressed imager assembly having a short circuit between an address line and an overlying common electrode layer, includes the steps of applying a test voltage to the addressed line shorted to the common electrode, measuring current at each of a plurality of common electrode contact points disposed at selected intervals along selected edges of the common electrode, and processing the respective measured currents in accordance with a selected relationship to localize a short circuit location along the length of the shorted address line. In imager assembly arrangements in which it is possible to measure currents on opposite sides of the common electrode disposed substantially perpendicular to the orientation of the shorted address line, the selected relationship is I.sub.A-N /I.sub.a-n =(L-X)/X, wherein: I.sub.A-N are the measured currents from common electrode contact points along one common electrode opposite edge; I.sub.

Abstract: A radiation imager comprising an array of scintillator elements optically coupled to a photodetector array comprises a dielectric layer extending around at least the sidewalls of the scintillator elements, and preferably over the surface of the scintillator elements through which the incident radiation enters, and an optically reflective layer disposed over the dielectric layer. The dielectric layer has an optical index that is less than that of the scintillator material, and consequently light collection efficiency of the scintillator is improved as light photons generated in the scintillator reflected back into the scintillator both at the interface of the scintillator and the dielectric layer and at the optically reflective layer.

Abstract: A method for rapidly estimating power spectral density components .rho.(f) in the spectrum of an input signal, by first digitizing the input signal over a selected time interval at a selected sample rate; computing an m-th order prediction error energy as an arithmetic mean of forward and backward prediction error energies; and then computing an m-th order prediction error power from a previous reflection coefficient .GAMMA. computation. A control parameter .alpha. is generated; using .alpha. and .GAMMA., an m-th order entropy H and free energy F are then computed, from which is computed m-th order reflection coefficients as extremes of the m-th order Free energy. If the proper extremes are not found, new feedback for the (m+1)-st order solution is generated. If the proper extremes are found, the spectral components are computed and recorded.

Abstract: A method for rapidly estimating power spectral density components in the spectrum of an input signal, by digitizing the input signal over a selected time interval at a selected sample rate; and estimating an autocorrelation sequence for the digitized input signal before generating a solution b.sub.s.sup.0 to the autocorrelation sequence in a Yule-Walker equation by use of Levinson recursion. After generating a control parameter (temperature) .alpha., a non-linear MFE equation, ##EQU1## is solved with b.sub.s.sup.0 as an initial solution. Then, power spectral density components ##EQU2## are generated and recorded as estimates of the input signal.

Abstract: In order to solve the problem of the proximity effects which occurs in the fabrication of integrated circuit devices, a facile method is provided for automatically creating a new pattern in which variably spaced windage correction is applied over the mask. This permits the utilization of conventional design fabrication rules and systems without the concomitant problem of producing small feature sizes in isolated structures. The method produces highly desirable chip masks and is readily implemented on commercially available CAD systems presently being employed for the production of circuit masks. The method is automatic and extremely easily implemented.

Abstract: Hot electron injection into the gate oxides of MOSFET devices imposes limitations on the miniaturization of such devices in VLSI circuits. A buried channel with a graded, buried spacer is provided to guard against hot electron trapping effects while preserving process and structure compatibility with micron or submicron VLSI devices. The channel current is redirected into a buried channel at a distance away from the interface in the vicinity of the drain region where the hot electron effect is most likely to occur.

Abstract: Hot electron injection into the gate oxides of MOSFET devices imposes limitations on the miniaturization of such devices in VLSI circuits. A buried channel with a surface spacer is provided to guard against hot electron trapping effects while preserving process and structure compatibility with micron or submicron VLSI devices. The channel current is redirected into a buried channel at a distance away from the interface in the vicinity of the drain region where the hot electron effect is most likely to occur. Additionally, a surface implant is performed to improve any gate control that may be lost as a result of the buried channel so as to mitigate any degradition of the current-voltage characteristics of the device.

Abstract: Hot electron injection into the gate oxides of MOSFET devices imposes limitations on the miniaturization of such devices in VLSI circuits. A buried channel with a graded, buried spacer is provided to guard against hot electron trapping effects while preserving process and structure compatibility with micron or submicron VLSI devices. The channel current is redirected into a buried channel at a distance away from the interface in the vicinity of the drain region where the hot electron effect is most likely to occur.

Abstract: Multispectral imaging apparatus for producing a composite visible/infrared image includes a wavelength-independent focus reflective optical system for focusing visible and infrared radiation from a scene onto a hybrid visible/infrared radiation detector. The detector comprises an array of visible radiation responsive elements interspersed with infrared radiation responsive elements and provides first and second output signals corresponding, respectively, to the visible and the infrared radiation impinging upon the detector. The first and second signals are converted to a visible black and white image of the scene and a step-tone false color infrared image of the scene. The images are combined in exact spatial registration to produce a composite image comprising a visible image of the scene which is highlighted by the infrared radiation emitted by the scene.

Abstract: Hot electron injection into the gate oxides of MOSFET devices imposes limitations on the miniaturization of such devices in VLSI circuits. A buried channel with a surface spacer is provided to guard against hot electron trapping effects while preserving process and structure compatibility with micron or submicron VLSI devices. The channel current is redirected into a buried channel at a distance away from the interface in the vicinity of the drain region where the hot electron effect is most likely to occur. Additionally, a surface implant is performed to improve any gate control that may be lost as a result of the buried channel so as to mitigate any degradation of the current-voltage characteristics of the device.

Abstract: In semiconductor imaging apparatus a composite electrode structure which transmits a high percentage of the radiation incident thereon and which also has high electrical conductivity is provided as the first level of a two level electrode structure.