Patents by Inventor Joseph M. Rash
Joseph M. Rash has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7403532Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.Type: GrantFiled: December 22, 2004Date of Patent: July 22, 2008Assignee: International Business Machines CorporationInventors: Dennis Albert Doidge, Jim P. Ervin, Douglas Ray Henderson, Edward Hau-chun Ku, Pramod Narottambhai Patel, Loren Blair Reiss, Thomas Eric Ryle, Joseph M. Rash
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Patent number: 6970468Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.Type: GrantFiled: October 31, 2003Date of Patent: November 29, 2005Assignee: International Business Machines CorporationInventors: Dennis Albert Doidge, Jim P. Ervin, Douglas Ray Henderson, Edward Hau-chun Ku, Pramod Narottambhai Patel, Loren Blair Reiss, Thomas Eric Ryle, Joseph M. Rash
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Patent number: 6944164Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.Type: GrantFiled: October 31, 2003Date of Patent: September 13, 2005Assignee: International Business Machines CorporationInventors: Dennis Albert Doidge, Jim P. Ervin, Douglas Ray Henderson, Edward Hau-chun Ku, Pramod Narottambhai Patel, Loren Blair Reiss, Thomas Eric Ryle, Joseph M. Rash
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Publication number: 20040105448Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.Type: ApplicationFiled: October 31, 2003Publication date: June 3, 2004Inventors: Dennis Albert Doidge, Jim P. Ervin, Douglas Ray Henderson, Edward Hau-Chun Ku, Pramod Narottambhai Patel, Loren Blair Reiss, Thomas Eric Ryle, Joseph M. Rash
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Publication number: 20040090967Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.Type: ApplicationFiled: October 31, 2003Publication date: May 13, 2004Inventors: Dennis Albert Doidge, Jim P. Ervin, Douglas Ray Henderson, Edward Hau-Chun Ku, Pramond Narottambhai Patel, Loren Blair Reiss, Thomas Eric Ryle, Joseph M. Rash
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Publication number: 20040090987Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.Type: ApplicationFiled: October 31, 2003Publication date: May 13, 2004Inventors: Dennis Albert Doidge, Jim P. Ervin, Douglas Ray Henderson, Edward Hau-Chun Ku, Pramod Narottambhai Patel, Loren Blair Reiss, Thomas Eric Ryle, Joseph M. Rash
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Patent number: 6272134Abstract: A method and system are provided for increasing processing efficiency associated with data frames transiting a network node having multiple ports. The method and system accomplish their objects via the following. A data frame having a header and data is received. An associated pointer for at least one portion of the received data frame is provided. The associated pointer is provided by segmenting each received data frame into parts, and associating with each segmented part a pointer. Thereafter, a portion of the received data frame is modified independent of other portions of the received data frame via utilization of given one or more of the associated pointers. Additionally, one or more copies of a portion (which can include the whole) of the received data frame is constructed by recalling each segmented part associated with one or more selected ones of the associated pointers. Furthermore, a determination is made as to whether the received header indicates unicast or multicast.Type: GrantFiled: November 20, 1997Date of Patent: August 7, 2001Assignee: International Business Machines CorporationInventors: Brian M. Bass, Douglas R. Henderson, Edward Hau-chun Ku, Scott J. Lemke, Joseph M. Rash, Loren Blair Reiss, Thomas Eric Ryle
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Patent number: 6178462Abstract: A system for coupling a local area network to a wide area network utilizes a PCI (Peripheral Component Interface) bus to couple a PCI interface to a PCI network interface card, which is coupled to the wide area network. The wide area network could be an asynchronous transfer mode network or a high bandwidth ethernet. If the PCI network interface card operates as a PCI master, then the PCI interface will operate as a PCI slave. If the PCI network interface card operates as a PCI slave, then the PCI interface of the invention will operate as a PCI master.Type: GrantFiled: November 24, 1997Date of Patent: January 23, 2001Assignee: International Business Machines CorporationInventors: Brian M. Bass, Dennis Albert Doidge, Edward Hau-chun Ku, Scott J. Lemke, Joseph M. Rash, Loren Blair Reiss
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Patent number: 6144668Abstract: A method and system are provided for enabling simultaneous cut-through and store-and-forward transmission of frames in high speed network devices. A Buffer Parameter Vector chains multiple frame buffers together. Frame Parameter Vectors created for each unique version of a frame are used to manage frames as they flow through the network device. Cut-through/store-and-forward decision logic determines whether frames can be transmitted by cut-through or store-and-forward. Multiple unique frames or copies of a frame that are to be transmitted store-and-forward have their Frame Parameter Vectors chained together by pointers. The cut-through/store-and-forward decision logic steps through the chain of Frame Parameter Vectors resulting in the frames associated with each Frame Parameter Vector being transmitted.Type: GrantFiled: November 26, 1997Date of Patent: November 7, 2000Assignee: International Business Machines CorporationInventors: Brian M. Bass, Douglas Ray Henderson, Edward Hau-chun Ku, Scott J. Lemke, Joseph M. Rash, Loren Blair Reiss, Thomas Eric Ryle
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Patent number: 6064674Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.Type: GrantFiled: October 22, 1997Date of Patent: May 16, 2000Assignee: International Business Machines CorporationInventors: Dennis Albert Doidge, Jim P. Ervin, Douglas Ray Henderson, Edward Hau-chun Ku, Pramod Narottambhai Patel, Loren Blair Reiss, Thomas Eric Ryle, Joseph M. Rash
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Patent number: 6052375Abstract: A method and system are provided for traffic shaping and bandwidth scaling in a high speed internetworking device. A slot time wheel mechanism is provided for traffic rate control and a credit/debit mechanism is provided for traffic shaping and scaling. The high speed traffic scaler and shaper incorporates a programmable slot time wheel, a traffic scaler state machine, a traffic shaper parameter table and a traffic scaler processor. The traffic scaler processor incorporates a traffic queue allocation manager, a queue priority arbiter, a port enable selector, a port priority arbiter and a DMA channel arbiter. The traffic queue allocation manager and the queue priority, port priority and DMA channel arbiters are each controlled by a corresponding state machine. The parameters in the traffic shaper parameter table are dynamically updated for each logical queue and are used to enable the credit/debit mechanism.Type: GrantFiled: November 26, 1997Date of Patent: April 18, 2000Assignee: International Business Machines CorporationInventors: Brian M. Bass, Jim P. Ervin, Douglas Ray Henderson, Edward Hau-chun Ku, Joseph Kinman Lee, Scott J. Lemke, Joseph M. Rash, Loren Blair Reiss
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Patent number: 6035360Abstract: A memory interface for multi-port access to a memory unit, such as a static random-access memory (SRAM) device. The memory interface, which is generally adapted for a local area network (LAN) forwarding engine, provides single port read/write access to SRAM device, and arbitrates requests from the access interfaces to allocate bandwidth of the SRAM device among the requests. One embodiment allocates at least 50% of the bandwidth to a peripheral component interface (PCI) bus target interface and a PCI bus master interface, collectively. The arbitration logic may include a plurality of bandwidth control registers associated with respective access interfaces used to determine a permitted amount of bandwidth that an access interface is to have, wherein a request from an access interface is masked based on a value in its associated bandwidth control register. Arbitration can further allocate bandwidth using time division multiplexing.Type: GrantFiled: October 29, 1997Date of Patent: March 7, 2000Assignee: International Business Machines CorporationInventors: Dennis Albert Doidge, Douglas Ray Henderson, Edward Hau-chun Ku, Pramod Narottambhai Patel, Joseph M. Rash, Thomas Eric Ryle
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Patent number: 5878229Abstract: A sequence in which two or more of the data units enter the network node, via a specific one of the multiple ports, is recorded. And, the two or more of the data units are transmitted from the network node according to the recorded sequence. The method and system achieve the recording of sequence via the following. In response to an insertion of one of the two or more data units into a specific one of the multiple processor subsystems, the specific one of the multiple processor subsystems is associated with a specific one of the multiple ports by which the one of the two or more data units entered the network node, and any other of the multiple processor subsystems that are currently processing on any other of the two or more data units that entered the network node through the specific one of the multiple ports is noted.Type: GrantFiled: November 12, 1997Date of Patent: March 2, 1999Assignee: International Business Machines CorporationInventors: Brian M. Bass, Edward Hau-chun Ku, Scott J. Lemke, Joseph M. Rash, Loren Blair Reiss