Patents by Inventor Joseph M. Sullivan

Joseph M. Sullivan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230315143
    Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
    Type: Application
    Filed: June 5, 2023
    Publication date: October 5, 2023
    Inventors: Vasudevan Srinivasan, Krishnakanth V. Sistla, Corey D. Gough, Ian M. Steiner, Nikhil Gupta, Vivek Garg, Ankush Varma, Sujal A. Vora, David P. Lerner, Joseph M. Sullivan, Nagasubramanian Gurumoorthy, William J. Bowhill, Venkatesh Ramamurthy, Chris MacNamara, John J. Browne, Ripan Das
  • Patent number: 11703906
    Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: July 18, 2023
    Assignee: Intel Corporation
    Inventors: Vasudevan Srinivasan, Krishnakanth V. Sistla, Corey D. Gough, Ian M. Steiner, Nikhil Gupta, Vivek Garg, Ankush Varma, Sujal A. Vora, David P. Lerner, Joseph M. Sullivan, Nagasubramanian Gurumoorthy, William J. Bowhill, Venkatesh Ramamurthy, Chris MacNamara, John J. Browne, Ripan Das
  • Publication number: 20220129031
    Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
    Type: Application
    Filed: November 5, 2021
    Publication date: April 28, 2022
    Inventors: Vasudevan Srinivasan, Krishnakanth V. Sistla, Corey D. Gough, Ian M. Steiner, Nikhil Gupta, Vivek Garg, Ankush Varma, Sujal A. Vora, David P. Lerner, Joseph M. Sullivan, Nagasubramanian Gurumoorthy, William J. Bowhill, Venkatesh Ramamurthy, Chris MacNamara, John J. Browne, Ripan Das
  • Patent number: 11169560
    Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: November 9, 2021
    Assignee: Intel Corporation
    Inventors: Vasudevan Srinivasan, Krishnakanth V. Sistla, Corey D. Gough, Ian M. Steiner, Nikhil Gupta, Vivek Garg, Ankush Varma, Sujal A. Vora, David P. Lerner, Joseph M. Sullivan, Nagasubramanian Gurumoorthy, William J. Bowhill, Venkatesh Ramamurthy, Chris Macnamara, John J. Browne, Ripan Das
  • Publication number: 20190384348
    Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
    Type: Application
    Filed: February 24, 2017
    Publication date: December 19, 2019
    Inventors: Vasudevan SRINIVASAN, Krishnakanth V. SISTLA, Corey D. GOUGH, Ian M. STEINER, Nikhil GUPTA, Vivek GARG, Ankush VARMA, Sujal A. VORA, David P. LERNER, Joseph M. SULLIVAN, Nagasubramanian GURUMOORTHY, William J. BOWHILL, Venkatesh RAMAMURTHY, Chris MACNAMARA, John J. BROWNE, Ripan DAS
  • Patent number: 10301786
    Abstract: An apparatus may be positioned at the side of a roadway for ensnaring tires of an oncoming land vehicle. The apparatus comprises a base layer further comprising a plurality of receptacles to hold spikes at both lengthwise edges of the base layer. The base layer is adapted to support a net package in a rolled stowed configuration. The net package includes a set of spikes tethered to netting. A deployment hose is connected to the base layer to cause the base layer to become unrolled for deployment when the deployment hose is inflated.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: May 28, 2019
    Assignee: Pacific Scientific Energetic Materials Company (California) LLC
    Inventors: Joseph M. Sullivan, Paul D. Wallis
  • Publication number: 20160281307
    Abstract: An apparatus to be positioned at the side of a roadway for ensnaring tires of an oncoming land vehicle is described. The apparatus comprises a continuous base layer further comprising a plurality of spike holders. The base layer is adapted to support a net package in a rolled stowed configuration. The net package includes a set of spikes tethered to netting. A deployment hose is connected to the base layer to cause the base layer to become unrolled for deployment when the deployment hose is inflated.
    Type: Application
    Filed: March 23, 2015
    Publication date: September 29, 2016
    Inventors: Joseph M. Sullivan, Paul D. Wallis
  • Publication number: 20160281308
    Abstract: An apparatus to be positioned at the side of a roadway for ensnaring tires of an oncoming land vehicle is described. The apparatus comprises a base layer further comprising a plurality of receptacles to hold spikes at both lengthwise edges of the base layer. The base layer is adapted to support a net package in a rolled stowed configuration. The net package includes a set of spikes tethered to netting. A deployment hose is connected to the base layer to cause the base layer to become unrolled for deployment when the deployment hose is inflated.
    Type: Application
    Filed: January 19, 2016
    Publication date: September 29, 2016
    Inventors: Joseph M. Sullivan, Paul D. Wallis
  • Patent number: 8165461
    Abstract: There is provided a tankless water heater for heating water passing therethrough. The modular heater comprises a plurality of heating units, each heating unit comprising a heating tube and a coupler, wherein each heating tube defines an interior region and each heating tube includes a helical structure whereby the helical structure imparts a swirling motion on water passing through the interior region of the tube. A heating element is also disposed within the interior region of the heating tube, and electric power applied to the heating element acts to heat the water passing through the tube. Temperature sensors may be positioned so as to detect water temperature proximate the inlet portion, and the outlet portion. Additionally, a flow meter is positioned proximate the inlet portion. The controller directs signals to switches positioned at each tube so as to apply electric current to the heating elements.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: April 24, 2012
    Inventor: Joseph M. Sullivan
  • Publication number: 20080285964
    Abstract: There is provided a tankless water heater for heating water passing therethrough. The tankless water heater includes a control module with a controller and a heating system, each of which are configured in a modular/separate arrangement. The heating system includes an inlet portion, an outlet portion, and a modular heater interconnected therebetween. The modular heater comprises a plurality of heating units, each heating unit comprising a heating tube and a coupler, wherein each heating tube defines an interior region and each heating tube includes a helical structure whereby the helical structure imparts a swirling motion on water passing through the interior region of the tube. A heating element is also disposed within the interior region of the heating tube, and electric power applied to the heating element acts to heat the water passing through the tube.
    Type: Application
    Filed: May 7, 2008
    Publication date: November 20, 2008
    Inventor: Joseph M. Sullivan
  • Patent number: 7164851
    Abstract: Control circuitry is disclosed for use with a tankless water heater system including a plurality of water conduits connected in series. The control circuitry includes a plurality of water heater elements, one each associated with each of the plurality of water conduits. A controller includes a central processing unit (CPU) with an operating program and each of the plurality of water heater elements are coupled to the CPU. The CPU is programmed to individually activate one of the water heater elements to a predetermined power level in response to a demand for heated water. The number of water heater elements activated and the power level of the activation is determined by the demand for heated water.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: January 16, 2007
    Inventors: William R. Sturm, Joseph M. Sullivan, Thomas J. Shortland, Kevin Hay, Gregg C. Johnson
  • Patent number: 7088915
    Abstract: A tankless water heater module is disclosed and includes a casing having a first end, a second end and a plurality of conduits formed therein. A top head manifold is coupled to the first end of the casing and includes a port aligned with each of the plurality of conduits. A bottom head manifold is coupled to the second end of the casing and includes a port aligned with each of the plurality of conduits. An immersion heating element extends through each port of the top head manifold and into the conduit aligned therewith. A flow path extends through the plurality of conduits, the plurality of conduits coupled in fluid communication by channels between ports of the top head manifold and a channel between ports of the bottom head manifold.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: August 8, 2006
    Assignee: Ion Tankless, Inc.
    Inventors: William R. Sturm, Joseph M. Sullivan, Thomas J. Shortland, Kevin Hay, Gregg C. Johnson
  • Patent number: 7046922
    Abstract: A tankless water heater module is disclosed and includes a casing having a first end, a second end and a plurality of conduits formed therein. A top head manifold is coupled to the first end of the casing and includes a port aligned with each of the plurality of conduits. A bottom head manifold is coupled to the second end of the casing and includes a port aligned with each of the plurality of conduits. An immersion heating element extends through each port of the top head manifold and into the conduit aligned therewith. A flow path extends through the plurality of conduits, the plurality of conduits coupled in fluid communication by channels between ports of the top head manifold and a channel between ports of the bottom head manifold.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: May 16, 2006
    Assignee: Ion Tankless, Inc.
    Inventors: William R. Sturm, Joseph M. Sullivan, Thomas J. Shortland, Kevin Hay, Gregg C. Johnson
  • Patent number: 6678949
    Abstract: A structure for mounting electronic devices. The structure uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: January 20, 2004
    Assignee: International Business Machines Corporation
    Inventors: Chandrika Prasad, Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann, Kimberley A. Kelly, Bouwe W. Leenstra, Voya R. Markovich, Eric D. Perfecto, Sampath Purushothaman, Joseph M. Sullivan
  • Patent number: 6527935
    Abstract: An apparatus and process for electroplating a pin grid array device having a plurality of pins, the pins having a side surface and an extremity. The apparatus comprises a contact plate defining a plane and having a plurality of electrically conductive flexible contact fingers extending from the contact plate away from the plane, the contact fingers adapted to flex when contacted by the pins. The process comprises contacting each of the plurality of pins with a flexible contact finger extending from a single electrically conductive plate, the conductive plate defining a plane, wherein the flexible contact fingers extend away from the plane.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: March 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: Emanuele F. Lopergolo, Mark A. Brandon, Arden S. Lake, Joseph M. Sullivan, Jr.
  • Patent number: 6497805
    Abstract: A method, system and structure for a pin grid or pad grid array structure includes a plurality of pins connected to an electronic structure, a power plane within the electronic structure electrically connected to power pins, a ground plane within the electronic structure, and fuse portions electrically connecting the ground plane to ground pins and signal pins. The power plane and the ground plane create a charge in the pins during electroplating of the pins. The fuse portions disconnecting the signal pins from the ground plane after the electroplating.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: December 24, 2002
    Assignee: International Business Machines Corporation
    Inventors: Arden S. Lake, Emanuele F. Lopergolo, Joseph M. Sullivan
  • Publication number: 20020125124
    Abstract: A method, system and structure for a pin grid or pad grid array structure includes a plurality of pins connected to an electronic structure, a power plane within the electronic structure electrically connected to power pins, a ground plane within the electronic structure, and fuse portions electrically connecting the ground plane to ground pins and signal pins. The power plane and the ground plane create a charge in the pins during electroplating of the pins. The fuse portions disconnecting the signal pins from the ground plane after the electroplating.
    Type: Application
    Filed: January 12, 2001
    Publication date: September 12, 2002
    Inventors: Arden S. Lake, Emanuele F. Lopergolo, Joseph M. Sullivan
  • Publication number: 20010037565
    Abstract: A structure for mounting electronic devices. The structure uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.
    Type: Application
    Filed: June 21, 2001
    Publication date: November 8, 2001
    Inventors: Chandrika Prasad, Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann, Kimberley A. Kelly, Bouwe W. Leenstra, Voya R. Markovich, Eric D. Perfecto, Sampath Purushothaman, Joseph M. Sullivan
  • Patent number: 6281452
    Abstract: A structure for mounting electronic devices which uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.
    Type: Grant
    Filed: December 3, 1998
    Date of Patent: August 28, 2001
    Assignee: International Business Machines Corporation
    Inventors: Chandrika Prasad, Roy Yu, Richard L. Canull, Giulio DiGiacomo, Ajay P. Giri, Lewis S. Goldmann, Kimberley A. Kelly, Bouwe W. Leenstra, Voya R. Markovich, Eric D. Perfecto, Sampath Purushothaman, Joseph M. Sullivan
  • Publication number: 20010004965
    Abstract: An apparatus and process for electroplating a pin grid array device having a plurality of pins, the pins having a side surface and an extremity. The apparatus comprises a contact plate defining a plane and having a plurality of electrically conductive flexible contact fingers extending from the contact plate away from the plane, the contact fingers adapted to flex when contacted by the pins. The process comprises contacting each of the plurality of pins with a flexible contact finger extending from a single electrically conductive plate, the conductive plate defining a plane, wherein the flexible contact fingers extend away from the plane.
    Type: Application
    Filed: February 7, 2001
    Publication date: June 28, 2001
    Inventors: Emanuele F. Lopergolo, Mark A. Brandon, Arden S. Lake, Joseph M. Sullivan