Patents by Inventor Joseph Marsh

Joseph Marsh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250054570
    Abstract: A method of identifying stable peptides from a protein, said method comprising: obtaining a peptide from a protein; comparing a solvent-accessible surface area (SASA) of the peptide with a SASA of a corresponding peptide region within the protein; using a result of the comparison to determine whether or not the peptide is structurally stable relative to the corresponding peptide region within the protein. Also disclosed is use of the method to identify stable immunogenic epitopes of SARS-CoV-2, and methods of detecting an antibody response.
    Type: Application
    Filed: December 8, 2022
    Publication date: February 13, 2025
    Inventors: Nick Gilbert, Dirk Kleinjan, Joseph Marsh, Patrick Kearns
  • Publication number: 20200155906
    Abstract: A training ball includes a resilient shell having an outer surface and an inner surface defining an interior chamber therein. Weighted filler material is disposed within the chamber. A valve stem extends radially inwardly from the shell inner surface and into the interior chamber. An opening along the valve stem extending from the interior chamber to the outer surface of the shell, with a valve disposed in the opening. A transition between the valve stem and an inner surface of the outer shell is curved, tapered, or otherwise graduated to reduce stress at the transition such that a widest portion of the transition is at least twice as wide as a narrowest portion of the valve stem. The transition can be curved with a fillet radius of between about 5-15% of the outer diameter of the ball, and/or between about 4-10 mm.
    Type: Application
    Filed: November 19, 2018
    Publication date: May 21, 2020
    Inventors: Joseph Marsh, James Michael Rathwell
  • Publication number: 20080046109
    Abstract: Methods and systems for position sensing are disclosed. In one embodiment, a method includes measuring at least three discrete point positions associated with a first component using at least one transmitter having a known position and orientation and in a line of sight with the three discrete point positions, the three discrete point positions having known distances relative to one another. The method computes a current position and orientation of the first component using data provided by the at least one transmitter and the three discrete point positions, along with position and orientation data from a last known location of the first component assuming that no sudden position changes since the first component has moved from the last known location. The first and second components may be a workpiece and a tool that performs a manufacturing operation on the workpiece.
    Type: Application
    Filed: October 24, 2007
    Publication date: February 21, 2008
    Applicant: THE BOEING COMPANY
    Inventors: Philip Freeman, John Dworschak, Joseph Marsh
  • Publication number: 20070200605
    Abstract: A dual purpose current mode logic (“CML”) latch circuit is provided which includes a CML latch operable to receive at least a pair of differential input data signals and at least one clock signal. The CML latch is operable to generate at least one output signal in accordance with the states of the pair of input differential data signals. A mode control device is operable to receive a mode control signal to operate the CML latch as a buffer or as a latch. In such way, when the mode control signal is inactive, the CML latch generates and latches the output signal at a timing determined by the at least one clock signal, and when the mode control signal is active the CML latch generates the output signal such that the output signal changes whenever the states of the pair of differential input data signals change.
    Type: Application
    Filed: February 28, 2006
    Publication date: August 30, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joseph Marsh, Joseph Natonio, James Wilson
  • Publication number: 20070103350
    Abstract: In a first aspect, a method of testing an analog circuit is provided. The method includes (1) providing the analog circuit with a screening circuit adapted to cause the analog circuit to function like a logic gate during a test; and (2) applying digital signals to the analog circuit to test the analog circuit at a wafer level so as to detect a defect in one or more components of the analog circuit. Numerous other aspects are provided.
    Type: Application
    Filed: November 10, 2005
    Publication date: May 10, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Louis Hsu, Jack Mandelman, Joseph Marsh, Steven Zier
  • Publication number: 20060224268
    Abstract: Methods and systems for position sensing are disclosed. In one embodiment, a method includes measuring at least three discrete point positions associated with a first component by using at least one transmitter having a known position and orientation and in a line of sight with the three discrete point positions, the three discrete point positions having known distances relative to one another. The method computes a current position and orientation of the first component using data provided by the at least one transmitter and the three discrete point positions, along with position and orientation data from a last known location of the first component assuming that no sudden position changes since the first component has moved from the last known location. The first and second components may be a workpiece and a tool that performs a manufacturing operation on the workpiece.
    Type: Application
    Filed: March 31, 2005
    Publication date: October 5, 2006
    Applicant: The Boeing Company
    Inventors: Philip Freeman, John Dworschak, Joseph Marsh
  • Publication number: 20050246125
    Abstract: A circuit and method of testing an analog driver circuit using digital scan-based test methodologies. The circuit of the present invention comprises a control circuit for generating signals in response to a test enable signal, a differential driver circuit for receiving a differential input signal, amplifying the differential input signal and transmitting a differential output signal in response to the differential input signal and the signals generated by the control circuit, a programmable termination impedance circuit for generating a differential termination impedance at the output node of the differential driver circuit in response the signals generated by the control circuit, and a differential receiver circuit for receiving the differential output from the differential driver circuit, convert the differential output signal to a single ended signal and transmitting the single ended signal, all in response to the test enable signal.
    Type: Application
    Filed: March 25, 2004
    Publication date: November 3, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joseph Marsh, Jeremy Stephens, Charlie Hwang, James Mason, Huihao Xu, Matthew Baecher, Thomas Bardsley, Mark Taylor
  • Publication number: 20050044337
    Abstract: A method for decoding a memory array address for an embedded DRAM (eDRAM) device is disclosed, the eDRAM device being configured for operation with an SDRAM memory manager. In an exemplary embodiment of the invention, the method includes receiving a set of row address bits from the memory manager at a first time. A set of initial column address bits is then subsequently from the memory manager at a later time. The set of initial column address bits are translated to a set of translated column address bits, and the set of row address bits and the set of translated column address bits are simultaneously used to access a desired memory location in the eDRAM device. The desired memory location in the eDRAM device has a row address corresponding to the value of the set of row address bits and a column address corresponding to the value of the set of translated column address bits.
    Type: Application
    Filed: September 28, 2004
    Publication date: February 24, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William Corti, Joseph Marsh, Michael Won
  • Publication number: 20050017350
    Abstract: A thermal conductive tape article is provided which is adhered to the surface of an integrated circuit device to dissipate heat from the device. The thermal conductive tape article is preferably corrugated and may have a number of configurations providing an expanded surface area. The corrugated tape article may also have a metal strip bonded to one or both sides of the tape article to form a single-faced or double-faced corrugated tape article. The tape article is preferably made of copper or aluminum.
    Type: Application
    Filed: August 18, 2004
    Publication date: January 27, 2005
    Applicant: International Business Machines Corporation
    Inventors: William Corti, David Long, Joseph Marsh, Francis Scanzano, Michael Won, Tsorng-Dih Yuan