Patents by Inventor Joseph Merrett

Joseph Merrett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10897182
    Abstract: A power producing apparatus includes a stator portion having a stator ring disposed proximate a housing of a turbine engine. The stator potion further includes a plurality of coils. A rotor portion includes a rotor ring having a plurality of permanent magnets disposed coaxial to the plurality of coils, and the permanent magnets are oriented with alternating polarity. Individual or a plurality of coils are configured to be selectively moved axially with respect to the rotor ring.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: January 19, 2021
    Assignee: United States of America as represented by the Secretary of the Air Force
    Inventors: Joseph Merrett, Serhiy Leontsev, Daniel Gillaugh, Kevin Yost, Gregory Minkiewicz, James Hendershot, Jr.
  • Publication number: 20080093637
    Abstract: A vertical junction field effect transistor (VJFET) having a mesa termination and a method of making the device are described. The device includes: an n-type mesa on an n-type substrate; a plurality of raised n-type regions on the mesa comprising an upper n-type layer on a lower n-type layer; p-type regions between and adjacent the raised n-type regions and along a lower sidewall portion of the raised regions; dielectric material on the sidewalls of the raised regions, on the p-type regions and on the sidewalls of the mesa; and electrical contacts to the substrate (drain), p-type regions (gate) and the upper n-type layer (source). The device can be made in a wide-bandgap semiconductor material such as SiC. The method includes selectively etching through an n-type layer using a mask to form the raised regions and implanting p-type dopants into exposed surfaces of an underlying n-type layer using the mask.
    Type: Application
    Filed: August 10, 2007
    Publication date: April 24, 2008
    Applicant: SEMISOUTH LABORATORIES, INC.
    Inventors: Igor SANKIN, Joseph MERRETT
  • Publication number: 20080061362
    Abstract: Junction field-effect transistors with vertical channels and self-aligned regrown gates and methods of making these devices are described. The methods use techniques to selectively grow and/or selectively remove semiconductor material to form a p-n junction gate along the sides of the channel and on the bottom of trenches separating source fingers. Methods of making bipolar junction transistors with self-aligned regrown base contact regions and methods of making these devices are also described. The semiconductor devices can be made in silicon carbide.
    Type: Application
    Filed: November 5, 2007
    Publication date: March 13, 2008
    Applicant: SEMISOUTH LABORATORIES, INC.
    Inventors: Joseph Merrett, Igor Sankin
  • Publication number: 20080003731
    Abstract: A switching element combining a self-aligned, vertical junction field effect transistor with etched-implanted gate and an integrated antiparallel Schottky barrier diode is described. The anode of the diode is connected to the source of the transistor at the device level in order to reduce losses due to stray inductances. The SiC surface in the SBD anode region is conditioned through dry etching to achieve a low Schottky barrier height so as to reduce power losses associated with the turn on voltage of the SBD.
    Type: Application
    Filed: June 12, 2007
    Publication date: January 3, 2008
    Inventors: Michael Mazzola, Joseph Merrett
  • Publication number: 20070275527
    Abstract: Junction field-effect transistors with vertical channels and self-aligned regrown gates and methods of making these devices are described. The methods use techniques to selectively grow and/or selectively remove semiconductor material to form a p-n junction gate along the sides of the channel and on the bottom of trenches separating source fingers. Methods of making bipolar junction transistors with self-aligned regrown base contact regions and methods of making these devices are also described. The semiconductor devices can be made in silicon carbide.
    Type: Application
    Filed: December 5, 2005
    Publication date: November 29, 2007
    Inventors: Joseph Merrett, Igor Sankin
  • Publication number: 20070243668
    Abstract: Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single- or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature-tolerant and radiation-resistant electronics components. Methods of making the devices are also described.
    Type: Application
    Filed: April 6, 2007
    Publication date: October 18, 2007
    Inventors: Igor Sankin, Joseph Merrett
  • Publication number: 20070122951
    Abstract: A self-aligned silicon carbide power MESFET with improved current stability and a method of making the device are described. The device, which includes raised source and drain regions separated by a gate recess, has improved current stability as a result of reduced surface trapping effects even at low gate biases. The device can be made using a self-aligned process in which a substrate comprising an n+-doped SiC layer on an n-doped SiC channel layer is etched to define raised source and drain regions (e.g., raised fingers) using a metal etch mask. The metal etch mask is then annealed to form source and drain ohmic contacts. A single- or multilayer dielectric film is then grown or deposited and anisotropically etched. A Schottky contact layer and a final metal layer are subsequently deposited using evaporation or another anisotropic deposition technique followed by an optional isotropic etch of dielectric layer or layers.
    Type: Application
    Filed: January 30, 2007
    Publication date: May 31, 2007
    Inventors: Igor Sankin, Janna Casady, Joseph Merrett
  • Publication number: 20070012946
    Abstract: A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel, drift and drain layers can be epitaxially grown. The ohmic contacts to the source, gate, and drain regions can be formed on the same side of the wafer. The devices can have different threshold voltages depending on the vertical channel width and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used for digital, analog, and monolithic microwave integrated circuits. Methods for making the transistors and integrated circuits comprising the devices are also described.
    Type: Application
    Filed: August 18, 2006
    Publication date: January 18, 2007
    Inventors: Igor Sankin, Jeffrey Casady, Joseph Merrett
  • Publication number: 20060113593
    Abstract: Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single-or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature-tolerant and radiation-resistant electronics components. Methods of making the devices are also described.
    Type: Application
    Filed: December 1, 2004
    Publication date: June 1, 2006
    Inventors: Igor Sankin, Joseph Merrett
  • Publication number: 20060113561
    Abstract: A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel, drift and drain layers can be epitaxially grown. The ohmic contacts to the source, gate, and drain regions can be formed on the same side of the wafer. The devices can have different threshold voltages depending on the vertical channel width and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used for digital, analog, and monolithic microwave integrated circuits. Methods for making the transistors and integrated circuits comprising the devices are also described.
    Type: Application
    Filed: December 1, 2004
    Publication date: June 1, 2006
    Inventors: Igor Sankin, Jeffrey Casady, Joseph Merrett
  • Publication number: 20060011924
    Abstract: A switching element combining a self-aligned, vertical junction field effect transistor with etched-implanted gate and an integrated antiparallel Schottky barrier diode is described. The anode of the diode is connected to the source of the transistor at the device level in order to reduce losses due to stray inductances. The SiC surface in the SBD anode region is conditioned through dry etching to achieve a low Schottky barrier height so as to reduce power losses associated with the turn on voltage of the SBD.
    Type: Application
    Filed: July 8, 2005
    Publication date: January 19, 2006
    Inventors: Michael Mazzola, Joseph Merrett
  • Publication number: 20050199882
    Abstract: A self-aligned silicon carbide power MESFET with improved current stability and a method of making the device are described. The device, which includes raised source and drain regions separated by a gate recess, has improved current stability as a result of reduced surface trapping effects even at low gate biases. The device can be made using a self-aligned process in which a substrate comprising an n+-doped SiC layer on an n-doped SiC channel layer is etched to define raised source and drain regions (e.g., raised fingers) using a metal etch mask. The metal etch mask is then annealed to form source and drain ohmic contacts. A single- or multilayer dielectric film is then grown or deposited and anisotropically etched. A Schottky contact layer and a final metal layer are subsequently deposited using evaporation or another anisotropic deposition technique followed by an optional isotropic etch of dielectric layer or layers.
    Type: Application
    Filed: March 11, 2005
    Publication date: September 15, 2005
    Inventors: Igor Sankin, Janna Casady, Joseph Merrett