Patents by Inventor Joseph Mogab

Joseph Mogab has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050095763
    Abstract: In one embodiment, metal boride (MBx), metal carbide (MCx), metal carbo-nitrides (MCxNy), metal boro-carbide (MBxCy), metal boro-nitride (MBxNy) or metal boro-carbo-nitride (MBxCyNz), wherein the metal is a transition metal (Group III-XII of the periodic chart) may be suitable as NMOS gate electrode materials. Such materials, such as TaC and LaB6, can be formed to have work functions that are within approximately 4-4.3 eV, which is desirable for NMOS transistors. In addition, the amount of carbon or nitrogen can be adjusting the amount of carbon or nitrogen in the precursor to achieve a predetermined metal work function.
    Type: Application
    Filed: October 29, 2003
    Publication date: May 5, 2005
    Inventors: Srikanth Samavedam, James Schaeffer, Philip Tobin, Bikas Maiti, Joseph Mogab
  • Patent number: 6297169
    Abstract: A passivating layer (220) is formed overlying portions of a mask (200). The mask (200) is used to pattern a semiconductor device substrate (62). In accordance with one embodiment of the present invention, the passivating layer (220) is removed prior to patterning the semiconductor device substrate (62). In yet another embodiment, the passivating layer (220) is cleaned prior to patterning the semiconductor device substrate (62) and then left to remain overlying portions of the mask (200) during the patterning process.
    Type: Grant
    Filed: July 27, 1998
    Date of Patent: October 2, 2001
    Assignee: Motorola, Inc.
    Inventors: Pawitter J. S. Mangat, C. Joseph Mogab, Kevin D. Cummings, Allison M. Fisher
  • Patent number: 6027961
    Abstract: In one embodiment, a metal layer (18) is formed over a gate dielectric layer (14, 16) on a semiconductor substrate. A masking layer (20) is patterned to mask a portion of the metal layer (18). An exposed portion of the metal layer (18) is nitrided to form a conductive nitride layer (24). The masking layer (20) is removed and the conductive nitride layer (24) is patterned to form a first gate electrode (23) having a first work function value, and the conductive layer (18) is patterned to form a second gate electrode (25) having a second work function value which is different from that of the first work function value.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: February 22, 2000
    Assignee: Motorola, Inc.
    Inventors: Bikas Maiti, Philip J. Tobin, C. Joseph Mogab, Christopher Hobbs, Larry E. Frisa
  • Patent number: 5510651
    Abstract: The present invention includes a semiconductor device having a layer including an elemental metal and its conductive metal oxide, wherein the layer is capable being oxidized or reduced preferentially to an adjacent region of the device. The present invention also includes processes for forming the devices. Substrate regions, silicon-containing layers, dielectric layers, electrodes, barrier layers, contact and via plugs, interconnects, and ferroelectric capacitors may be protected by and/or formed with the layer. Examples of elemental metals and their conductive metal oxides that may be used with the present invention are: ruthenium and ruthenium dioxide, rhenium and rhenium dioxide, iridium and iridium dioxide, osmium and osmium tetraoxide, or the like.
    Type: Grant
    Filed: November 18, 1994
    Date of Patent: April 23, 1996
    Assignee: Motorola, Inc.
    Inventors: Papu D. Maniar, Reza Moazzami, C. Joseph Mogab
  • Patent number: 5464711
    Abstract: A process for the fabrication of an X-ray absorbing mask includes providing a silicon substrate (10) having a front surface (16) and a back surface (18). A membrane layer (12) is formed on the front surface (16). In one embodiment of the invention, an etch stop layer (14) and an X-ray absorbing layer (20) are sequentially formed over the membrane layer (12). In a preferred embodiment, the X-ray absorbing layer (20) is tantalum silicon nitride deposited by RF sputter deposition directly onto the layers overlying the silicon substrate (10). The structure is then annealed at a temperature sufficient to reduce the internal stress in the X-ray absorbing layer (20). Finally, the X-ray absorbing layer is patterned to form a masking pattern (30, 36) on the membrane layer (12).
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: November 7, 1995
    Assignee: Motorola Inc.
    Inventors: C. Joseph Mogab, William J. Dauksher, Douglas J. Resnick
  • Patent number: 5407855
    Abstract: The present invention includes a semiconductor device having a layer including an elemental metal and its conductive metal oxide, wherein the layer is capable being oxidized or reduced preferentially to an adjacent region of the device. The present invention also includes processes for forming the devices. Substrate regions, silicon-containing layers, dielectric layers, electrodes, barrier layers, contact and via plugs, interconnects, and ferroelectric capacitors may be protected by and/or formed with the layer. Examples of elemental metals and their conductive metal oxides that may be used with the present invention are: ruthenium and ruthenium dioxide, rhenium and rhenium dioxide, iridium and iridium dioxide, osmium and osmium tetraoxide, or the like.
    Type: Grant
    Filed: June 7, 1993
    Date of Patent: April 18, 1995
    Assignee: Motorola, Inc.
    Inventors: Papu D. Maniar, Reza Moazzami, C. Joseph Mogab
  • Patent number: 5337207
    Abstract: A high-permittivity dielectric capacitor (28) having a refractory-metal oxide layer (16) framing the first electrode (14) of the capacitor (28) and separating a high-permittivity dielectric layer (24) from an insulating layer (12) underlying the capacitor (28). The high-permittivity dielectric layer (16) makes contact with the first electrode (14) through an opening (18) in the refractory-metal oxide layer (16). The refractory-metal oxide layer (16) separates the high-permittivity dielectric layer (24) from the insulating layer (12) in all regions away from the opening (18) in the refractory-metal oxide layer (16). During fabrication of the capacitor (28), when the high-permittivity dielectric layer (24) is patterned, the refractory-metal oxide layer (16) provides an etch-stop.
    Type: Grant
    Filed: December 21, 1992
    Date of Patent: August 9, 1994
    Assignee: Motorola
    Inventors: Robert E. Jones, Papu D. Maniar, C. Joseph Mogab
  • Patent number: 5254217
    Abstract: A method for patterning a conductive metal oxide film on a substrate surface by means of an oxygen plasma etching process. In one embodiment, a substrate (10) is provided having a ruthenium oxide layer (14) overlying a dielectric layer (12). The substrate is placed on an electrode (24) positioned in a vacuum chamber (20) and the vacuum chamber is evacuated to a low pressure. Oxygen gas is introduced to the vacuum chamber and RF power is applied to form an oxygen plasma within the vacuum chamber. The oxygen plasma preferentially etches the ruthenium oxide layer (14) and does not etch the underlying dielectric layer (12). The oxygen plasma etching process can be used to form high resolution ruthenium oxide features during semiconductor device fabrication of ferroelectric capacitors (60) and other electronic components.
    Type: Grant
    Filed: July 27, 1992
    Date of Patent: October 19, 1993
    Assignee: Motorola, Inc.
    Inventors: Papu Maniar, C. Joseph Mogab
  • Patent number: 4033287
    Abstract: An improved radio frequency (rf) powered radial flow cylindrical reactor utilizes a gas shield which substantially limits the glow plasma discharge reaction to a section of the reactor over the semiconductor substrates which are to be coated. The gas shield permits the use of higher rf input power which contributes to the formation of protective films that have desirable physical and electrical characteristics.
    Type: Grant
    Filed: January 22, 1976
    Date of Patent: July 5, 1977
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Frank Bernard Alexander, Jr., Cesar Deduyo Capio, Victor Emerald Hauser, Jr., Hyman Joseph Levinstein, Cyril Joseph Mogab, Ashok Kumar Sinha, Richard Siegfried Wagner