Abstract: Provided are methods and compositions comprising antibodies capable of specific binding to human CEACAM1 molecules, for treating and diagnosing cancer as well as assessing CEACAM1 expression in tumor infiltrating immune cells (TILs) in a biological sample obtained from a [cancer] subject.

Abstract: A method for passing communications over an Optical Transport Network (OTN) from a first communication interface to a second communication interface. The first interface extracts characters from received data symbols, maps the characters into OTN communication frames and discards the synchronization symbols. The mapping is performed using a Bit-synchronous Mapping Procedure (BMP), while filling some locations in the OTN frames with stuffing characters, so that the rate of the characters matches a desired rate of the OTN communication frames. The characters are extracted from the communication frames in the second communication interface by synchronizing to the mapped input frames independently of the synchronization symbols. The input frames are reconstructed to produce reconstructed input frames including the data symbols and the synchronization symbols, by re-encoding the extracted characters. In some embodiments, data from Ethernet frames is passed along with the extracted characters in the OTN frames.

Abstract: A method for communication includes, receiving in a first communication interface input frames, which include data symbols derived by encoding respective characters, and one or more synchronization symbols distinguishable from the data symbols. The characters are recovered from the data symbols, and transmitted to a second communication interface by mapping the characters into communication frames and discarding the synchronization symbols, wherein a protocol for delivering the characters supports a mapping scheme for delivering the characters at a first data rate, and mapping the characters includes mapping the characters so as to deliver the characters at a second data rate lower than the first data rate. The characters are extracted from the communication frames in the second communication interface by synchronizing to the mapped input frames independently of the synchronization symbols.

Abstract: A communication apparatus includes at least one input port, multiple output ports, at least one Serial-to-Parallel (S/P) converter and at least one Parallel-to-Serial (P/S) converter. The S/P converter is operative to receive from the input port an input data stream that is to be cross-connected to a destination output port, and to separate the input data stream into multiple sub-streams. Each of the switching planes includes at least one input for receiving a respective sub-stream from the S/P converter; multiple outputs, each output associated with a respective one of the output ports; and switching circuitry, which is configured to switch the respective sub-stream to the output that is associated with the destination output port. The P/S converter is coupled to the outputs of the switching planes so as to combine the multiple sub-streams switched by the switching circuitry into a combined output data stream at the destination output port.

Abstract: A communication apparatus includes at least one input port, multiple output ports, at least one Serial-to-Parallel (S/P) converter and at least one Parallel-to-Serial (P/S) converter. The S/P converter is operative to receive from the input port an input data stream that is to be cross-connected to a destination output port, and to separate the input data stream into multiple sub-streams. Each of the switching planes includes at least one input for receiving a respective sub-stream from the S/P converter; multiple outputs, each output associated with a respective one of the output ports; and switching circuitry, which is configured to switch the respective sub-stream to the output that is associated with the destination output port. The P/S converter is coupled to the outputs of the switching planes so as to combine the multiple sub-streams switched by the switching circuitry into a combined output data stream at the destination output port.

Abstract: A method for increasing bandwidth utilization of a transmission channel having a first bandwidth capacity and operative at a first transmission rate, the method including the steps of providing one or more input bit streams each having a transmission rate that does not exceed that of the first transmission rate, dividing the one or more input bit streams into a plurality of sub-streams, each having a bandwidth lower than the first bandwidth capacity, selecting a group of sub-streams out of the plurality of sub-streams which group has a combined bandwidth just lower than the first bandwidth capacity, carrying the selected group of sub-streams over the transmission channel, and assembling the selected group of sub-streams into an output bit stream.

Abstract: A switching system for a telecommunications network, including a switching matrix, a transport interface for receiving signals from a plurality of I/O ports, the signals being arranged in channels of at least a first and a second format, a plurality of cross-connections for switching the signals between the I/O ports via the switching matrix; and a server operatively associated with the switching matrix and including format exchanging circuitry operable to receive a signal arranged in the first format and to rearrange the signal into the second format, thus producing a converted signal, and to transmit the converted signal to the switching matrix for eventual output.

Abstract: This invention discloses an apparatus including an input, a series of shift registers and an output, the input arranged to receive a plurality of serial data streams, each of the data streams containing groups of data, and to take simultaneously data bits from at least some of the plurality of serial data streams and to place the data bits into the series of shift registers, such that the data bits of a given bit position in the data groups of the some of the plurality of serial data streams are placeable together in one of the shift registers, and successive bits of a part of one of the data groups are placed in a given data position across the shift registers, and the output being arranged to read out, in parallel, data of a given data position across the series of shift registers, simultaneously. A method of converting a plurality of serial data streams each carrying data groups into parts of the data groups arranged in parallel is also disclosed.

Abstract: Method and circuitry for determining the timing of data arriving to a predetermined point via a data-bus from two or more data sources located at different locations along the data-bus. The timing is initiated by a first clock signal selected from a plurality of clock signals, at a frequency that is transmitted from a first clock generator. For each data source, the total phase-shift of the data relative is equalized to the phase of the transmitted first clock signal. The total phase-shift is determined by transmitting a first clock signal via a separate transmission path and receiving it at the end of the path. The determined total phase-shift is then utilized for enabling data reading.