Patents by Inventor Joseph N. Greeley
Joseph N. Greeley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9634250Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.Type: GrantFiled: June 30, 2016Date of Patent: April 25, 2017Assignee: Micron Technology, Inc.Inventors: Joseph N. Greeley, John A. Smythe, III
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Publication number: 20160315258Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.Type: ApplicationFiled: June 30, 2016Publication date: October 27, 2016Inventors: Joseph N. Greeley, John A. Smythe, III
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Patent number: 9419219Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.Type: GrantFiled: August 19, 2015Date of Patent: August 16, 2016Assignee: Micron Technology, Inc.Inventors: Joseph N. Greeley, John A. Smythe, III
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Publication number: 20150357568Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.Type: ApplicationFiled: August 19, 2015Publication date: December 10, 2015Inventors: Joseph N. Greeley, John A. Smythe, III
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Patent number: 9142770Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.Type: GrantFiled: April 28, 2014Date of Patent: September 22, 2015Assignee: Micron Technology, Inc.Inventors: Joseph N. Greeley, John A. Smythe, III
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Publication number: 20140319446Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.Type: ApplicationFiled: April 28, 2014Publication date: October 30, 2014Applicant: Micron Technology, Inc.Inventors: Joseph N. Greeley, John A. Smythe, III
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Patent number: 8852851Abstract: A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.Type: GrantFiled: July 10, 2006Date of Patent: October 7, 2014Assignee: Micron Technology, Inc.Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph N. Greeley, Brian J. Coppa
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Patent number: 8735211Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.Type: GrantFiled: June 14, 2012Date of Patent: May 27, 2014Assignee: Micron Technology, Inc.Inventors: Joseph N. Greeley, John A. Smythe
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Patent number: 8603318Abstract: An electrolyte solution, methods, and systems for selectively removing a conductive metal from a substrate are provided. The electrolyte solution comprising nanoparticles that are more noble than the conductive metal being removed, is applied to a substrate to remove the conductive metal selectively relative to a dielectric material without application of an external potential or contact of a processing pad with a surface of the substrate. The solutions and methods can be applied, for example, to remove a conductive metal layer (e.g., barrier metal) selectively relative to a dielectric material and to a materially different conductive metal (e.g., copper interconnect) without application of an external potential or contact of a processing pad with the surface of the substrate.Type: GrantFiled: May 2, 2011Date of Patent: December 10, 2013Assignee: Micron Technology, Inc.Inventors: Rita J. Klein, Dale W. Collins, Paul Morgan, Joseph N. Greeley, Nishant Sinha
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Patent number: 8435904Abstract: A method of substantially uniformly removing silicon oxide is disclosed. The silicon oxide to be removed includes at least one cavity therein or more than one density or strain therein. The silicon oxide having the at least one cavity or more than one density or strain is exposed to a gaseous mixture of NH3 and HF and heated, to substantially uniformly remove the silicon oxide. A method of removing an exposed sacrificial layer without substantially removing exposed isolation regions using the gaseous mixture of NH3 and HF and heat is also disclosed, as is an intermediate semiconductor device structure that includes a semiconductor substrate, a sacrificial layer overlying the semiconductor substrate, a diffusion barrier overlying the sacrificial layer, and exposed isolation regions.Type: GrantFiled: August 4, 2010Date of Patent: May 7, 2013Assignee: Micron Technology, Inc.Inventors: Nishant Sinha, Gurtej S. Sandhu, Joseph N. Greeley
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Publication number: 20120298158Abstract: Several embodiments of cleaning systems using polyelectrolyte and various associated methods for cleaning microelectronic substrates are disclosed herein. One embodiment is directed to a system that has a substrate support for holding the microelectronic substrate, a dispenser positioned above the substrate support and facing a surface of the microelectronic substrate, a reservoir in fluid communication with the dispenser via a conduit, and a washing solution contained in the reservoir. The washing solution includes a polyelectrolyte.Type: ApplicationFiled: August 8, 2012Publication date: November 29, 2012Applicant: MICRON TECHNOLOGY, INC.Inventors: Joseph N. Greeley, Nishant Sinha, Lukasz Hupka, Timothy A. Quick, Prashant Raghu
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Patent number: 8298938Abstract: Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material.Type: GrantFiled: January 2, 2012Date of Patent: October 30, 2012Assignee: Micron Technology, Inc.Inventors: Timothy A. Quick, Eugene P. Marsh, Joseph N. Greeley
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Publication number: 20120267599Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.Type: ApplicationFiled: June 14, 2012Publication date: October 25, 2012Applicant: MICRON TECHNOLOGY, INC.Inventors: Joseph N. Greeley, John A. Smythe, III
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Patent number: 8252119Abstract: Several embodiments of cleaning systems using polyelectrolyte and various associated methods for cleaning microelectronic substrates are disclosed herein. One embodiment is directed to a system that has a substrate support for holding the microelectronic substrate, a dispenser positioned above the substrate support and facing a surface of the microelectronic substrate, a reservoir in fluid communication with the dispenser via a conduit, and a washing solution contained in the reservoir. The washing solution includes a polyelectrolyte.Type: GrantFiled: August 20, 2008Date of Patent: August 28, 2012Assignee: Micron Technology, Inc.Inventors: Joseph N. Greeley, Nishant Sinha, Lukasz Hupka, Timothy A. Quick, Prashant Raghu
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Patent number: 8241944Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.Type: GrantFiled: July 2, 2010Date of Patent: August 14, 2012Assignee: Micron Technology, Inc.Inventors: Joseph N. Greeley, John A. Smythe
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Publication number: 20120097911Abstract: Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material.Type: ApplicationFiled: January 2, 2012Publication date: April 26, 2012Applicant: MICRON TECHNOLOGY, INC.Inventors: Timothy A. Quick, Eugene P. Marsh, Joseph N. Greeley
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Patent number: 8097537Abstract: Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material.Type: GrantFiled: May 25, 2010Date of Patent: January 17, 2012Assignee: Micron Technology, Inc.Inventors: Timothy A. Quick, Eugene P. Marsh, Joseph N. Greeley
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Publication number: 20120001144Abstract: The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.Type: ApplicationFiled: July 2, 2010Publication date: January 5, 2012Applicant: MICRON TECHNOLOGY, INC.Inventors: Joseph N. Greeley, John A. Smythe, III
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Publication number: 20110291065Abstract: Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material.Type: ApplicationFiled: May 25, 2010Publication date: December 1, 2011Applicant: MICRON TECHNOLOGY, INC.Inventors: Timothy A. Quick, Eugene P. Marsh, Joseph N. Greeley
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Publication number: 20110203940Abstract: An electrolyte solution, methods, and systems for selectively removing a conductive metal from a substrate are provided. The electrolyte solution comprising nanoparticles that are more noble than the conductive metal being removed, is applied to a substrate to remove the conductive metal selectively relative to a dielectric material without application of an external potential or contact of a processing pad with the surface of the substrate. The solutions and methods can be applied, for example, to remove a conductive metal layer (e.g., barrier metal) selectively relative to dielectric material and to a materially different conductive metal (e.g., copper interconnect) without application of an external potential or contact of a processing pad with the surface of the substrate.Type: ApplicationFiled: May 2, 2011Publication date: August 25, 2011Inventors: Rita J. Klein, Dale W. Collins, Paul Morgan, Joseph N. Greeley, Nishant Sinha