Patents by Inventor Joseph P. Hartigan

Joseph P. Hartigan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High-speed memory arranged for operating synchronously with a microprocessor
    Patent number: 6088280
    Abstract: A synchronous random access memory is arranged to be responsive directly to a system clock signal for operating synchronously with the associated microprocessor. The synchronous random access memory is further arranged to either write-in or read out data in a synchronous burst operation or synchronous wrap operation in addition to synchronous random access operations. The synchronous random access memory device may be fabricated as a dynamic storage device or as a static storage device.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: July 11, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Wilbur Christian Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal, Kenneth A. Poteet, Joseph P. Hartigan, Roger D. Norwood
  • High speed memory arranged for operating synchronously with a microprocessor
    Patent number: 5982694
    Abstract: A synchronous random access memory is arranged to be responsive directly to a system clock signal for operating synchronously with the associated microprocessor. The synchronous random access memory is further arranged to either write-in or read out data in a synchronous burst operation or synchronous wrap operation in addition to synchronous random access operations. The synchronous random access memory device may be fabricated as a dynamic storage device or as a static storage device.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: November 9, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Wilbur Christian Vogley, Anthony Michael Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal, Kenneth A. Poteet, Joseph P. Hartigan, Roger D. Norwood
  • Data processing system arranged for operating synchronously with a high speed memory
    Patent number: 5912854
    Abstract: A synchronous random access memory is arranged to be responsive directly to a system clock signal for operating synchronously with the associated microprocessor. The synchronous random access memory is further arranged to either write-in or read out data in a synchronous burst operation or synchronous wrap operation in addition to synchronous random access operations. The synchronous random access memory device may be fabricated as a dynamic storage device or as a static storage device.
    Type: Grant
    Filed: August 4, 1997
    Date of Patent: June 15, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Wilbur Christian Vogley, Anthony Michael Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal, Kenneth A. Poteet, Joseph P. Hartigan, Roger D. Norwood
  • Random access memory with latency arranged for operating synchronously with a micro processor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock
    Patent number: 5808958
    Abstract: A synchronous random access memory is arranged to be responsive directly to a system clock signal for operating synchronously with the associated microprocessor. The synchronous random access memory is further arranged to either write-in or read out data in a synchronous burst operation or synchronous wrap operation in addition to synchronous random access operations. The synchronous random access memory device may be fabricated as a dynamic storage device or as a static storage device.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 15, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Wilbur Christian Vogley, Anthony Michael Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal, Kenneth A. Poteet, Joseph P. Hartigan, Roger D. Norwood
  • Random access memory arranged for operating synchronously with a microprocessor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock
    Patent number: 5587954
    Abstract: A synchronous random access memory is arranged to be responsive directly to a system clock signal for operating synchronously with the associated microprocessor. The synchronous random access memory is further arranged to either write-in or read out data in a synchronous burst operation or synchronous wrap operation in addition to synchronous random access operations. The synchronous random access memory device may be fabricated as a dynamic storage device or as a static storage device.
    Type: Grant
    Filed: October 21, 1994
    Date of Patent: December 24, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal, Kenneth A. Poteet, Joseph P. Hartigan, Roger D. Norwood
  • System including a data processor, a synchronous dram, a peripheral device, and a system clock
    Patent number: 5390149
    Abstract: A synchronous random access memory is arranged to be responsive directly to a system clock signal for operating synchronously with the associated microprocessor. The synchronous random access memory is further arranged to either write-in or read out data in a synchronous burst operation or synchronous wrap operation in addition to synchronous random access operations. The synchronous random access memory device may be fabricated as a dynamic storage device or as a static storage device.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: February 14, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Wilbur C. Vogley, Anthony M. Balistreri, Karl M. Guttag, Steven D. Krueger, Duy-Loan T. Le, Joseph H. Neal, Kenneth A. Poteet, Joseph P. Hartigan, Roger D. Norwood