Abstract: Different cores of a multicore processor are used to provide diagnostics of sophisticated hardware without full redundancy by static assignment of the cores during individual cycles of the control program and comparison of the outputs. A method of automatically generating diverse programs for execution by these cores may modify one program to compile two different instructions without functionally changing that program through the use of DeMorgan equivalents and diverse compiler optimizations.

Abstract: An industrial safety architecture integrates employee identity and enterprise-level security policy into plant-floor functional safety systems, allowing control and safety systems on the plant floor to regulate safe interactions with hazardous controlled machinery based on user identity or role. The architecture leverages existing employee identity and security policy data maintained on the corporate level of an industrial enterprise to manage identity- and/or role-based control and safety on the plant level. Safety authority systems at both the corporate level and the plant level of the industrial enterprise obtain employee and security policy data from corporate-level systems and provides this data in as SIL-rated manner to industrial control and safety systems on the plant floor, where the identity and security policy information is used by functional safety systems to control access to industrial systems as a function of user identity, role, certifications, or other qualifications.

Abstract: A system with multiple processing domains sharing a memory resource accessed via a shared memory controller detects a memory error. As data is written to the shared memory resource, each processing domain generates a diagnostic code as a function of the data, the memory address for the data, and of a unique identifier corresponding to the processing domain. The diagnostic code is stored with the data for verification when the data is read back. As the data is read back, the processing domain separates the diagnostic code from the data being read and generates another diagnostic code in the same manner as the original diagnostic code. The other diagnostic code is compared to the initial diagnostic code. If both diagnostic codes are the same, the processing domain can be confident that the data read from the shared memory resource is the same as the data that was originally written.

Abstract: A system with multiple processing domains sharing a memory resource accessed via a shared memory controller detects a memory error. As data is written to the shared memory resource, each processing domain generates a diagnostic code as a function of the data, the memory address for the data, and of a unique identifier corresponding to the processing domain. The diagnostic code is stored with the data for verification when the data is read back. As the data is read back, the processing domain separates the diagnostic code from the data being read and generates another diagnostic code in the same manner as the original diagnostic code. The other diagnostic code is compared to the initial diagnostic code. If both diagnostic codes are the same, the processing domain can be confident that the data read from the shared memory resource is the same as the data that was originally written.

Abstract: An industrial safety architecture integrates employee identity and enterprise-level security policy into plant-floor functional safety systems, allowing control and safety systems on the plant floor to regulate safe interactions with hazardous controlled machinery based on user identity or role. The architecture leverages existing employee identity and security policy data maintained on the corporate level of an industrial enterprise to manage identity- and/or role-based control and safety on the plant level. Safety authority systems at both the corporate level and the plant level of the industrial enterprise obtain employee and security policy data from corporate-level systems and provides this data in as SIL-rated manner to industrial control and safety systems on the plant floor, where the identity and security policy information is used by functional safety systems to control access to industrial systems as a function of user identity, role, certifications, or other qualifications.

Abstract: Hardware memory management units are used in an integrated safety/non-safety industrial computer to allow shared memory architecture processors to implement safety and non-safety reduced risk of memory corruption. Testing of the memory management unit of the non-safety processor may provide a periodic writing to protected memory to invoke a protection fault providing a report to the safety processor.

Abstract: Different cores of a multicore processor are used to provide diagnostics of sophisticated hardware without full redundancy by static assignment of the cores during individual cycles of the control program and comparison of the outputs. A method of automatically generating diverse programs for execution by these cores may modify one program to compile two different instructions without functionally changing that program through the use of DeMorgan equivalents and diverse compiler optimizations.

Abstract: Systems and methods are provided to facilitate receipt of tag requests from one or more interfaces, based upon which a single tagset is compiled at a controller comprising all the requested tags for a given update rate, whereupon the single compiled tagset is subsequently forwarded to the one or more interfaces. A controller generates a superset of tags associated with an industrial process. Each interface can request a copy of the superset, from which the required tags are selected. The controller receives the requested tags from all of the interfaces and combines the requested tags into a single tagset, for a given update rate, comprising the various parameters associated with the tags. At the selected update rate, the tagset is forwarded to the interfaces. A masterset can be utilized to identify the sequence of tags in a tagset and check code can ensure continuity of the tags in the tagset.

Abstract: Different cores of a multicore processor are used to provide diagnostics of sophisticated hardware without full redundancy by static assignment of the cores during individual cycles of the control program and comparison of the outputs. A method of automatically generating diverse programs for execution by these cores may modify one program to compile two different instructions without functionally changing that program through the use of DeMorgan equivalents and diverse compiler optimizations.

Abstract: The present inventors have recognized that highly reliable operation may be further achieved in industrial control systems by monitoring execution of programs in real time. Such monitoring may include detecting defective program sequences which may be caused by executing a wrong sequence, executing a sequence at a wrong time, and/or a faulty clock. In one aspect, a control program may be divided into executable modules. A first code stream may then execute to control an industrial process or machine using the executable modules stored in a first set. In addition, a second code stream may execute to verify the first code stream using executable modules stored in a second set. First and second execution sequence values may be generated based on execution of the first and second code streams. A comparison of the first and second execution sequence values may detect an error which may have occurred in the program.

Abstract: Different cores of a multicore processor are used to provide diagnostics of sophisticated hardware without full redundancy by static assignment of the cores during individual cycles of the control program and comparison of the outputs. A method of automatically generating diverse programs for execution by these cores may modify one program to compile two different instructions without functionally changing that program through the use of DeMorgan equivalents and diverse compiler optimizations.

Abstract: Systems and methods are provided to facilitate receipt of tag requests from one or more interfaces, based upon which a single tagset is compiled at a controller comprising all the requested tags for a given update rate, whereupon the single compiled tagset is subsequently forwarded to the one or more interfaces. A controller generates a superset of tags associated with an industrial process. Each interface can request a copy of the superset, from which the required tags are selected. The controller receives the requested tags from all of the interfaces and combines the requested tags into a single tagset, for a given update rate, comprising the various parameters associated with the tags. At the selected update rate, the tagset is forwarded to the interfaces. A masterset can be utilized to identify the sequence of tags in a tagset and check code can ensure continuity of the tags in the tagset.

Abstract: Hardware memory management units are used in an integrated safety/non-safety industrial computer to allow shared memory architecture processors to implement safety and non-safety reduced risk of memory corruption. Testing of the memory management unit of the non-safety processor may provide a periodic writing to protected memory to invoke a protection fault providing a report to the safety processor.

Abstract: Systems and methods are provided to facilitate receipt of tag requests from one or more interfaces, based upon which a single tagset is compiled at a controller comprising all the requested tags for a given update rate, whereupon the single compiled tagset is subsequently forwarded to the one or more interfaces. A controller generates a superset of tags associated with an industrial process. Each interface can request a copy of the superset, from which the required tags are selected. The controller receives the requested tags from all of the interfaces and combines the requested tags into a single tagset, for a given update rate, comprising the various parameters associated with the tags. At the selected update rate, the tagset is forwarded to the interfaces. A masterset can be utilized to identify the sequence of tags in a tagset and check code can ensure continuity of the tags in the tagset.

Abstract: Systems and methods are provided to facilitate correct execution of a machine jog operation where a plurality of interfaces can generate a machine jog command, which is received by an industrial controller. One or more machine jog commands can be received and state data is maintained regarding whether a machine jog command has been received. An OR gate logic operation is performed on the state data to determine whether a machine jog operation has been received from any of the plurality of interfaces, and in the event of receiving a machine jog operation, a control command is generated to effect a machine jog operation. The plurality of interfaces enable interaction with the controller, to facilitate control of a machine from a plurality of locations. The system can be expanded to include further interfaces. Also, information regarding a machine jog command can be published to the plurality of interfaces.

Abstract: The present inventors have recognized that highly reliable operation may be further achieved in industrial control systems by monitoring execution of programs in real time. Such monitoring may include detecting defective program sequences which may be caused by executing a wrong sequence, executing a sequence at a wrong time, and/or a faulty clock. In one aspect, a control program may be divided into executable modules. A first code stream may then execute to control an industrial process or machine using the executable modules stored in a first set. In addition, a second code stream may execute to verify the first code stream using executable modules stored in a second set. First and second execution sequence values may be generated based on execution of the first and second code streams. A comparison of the first and second execution sequence values may detect an error which may have occurred in the program.

Abstract: Systems and methods are provided to facilitate receipt of tag requests from one or more interfaces, based upon which a single tagset is compiled at a controller comprising all the requested tags for a given update rate, whereupon the single compiled tagset is subsequently forwarded to the one or more interfaces. A controller generates a superset of tags associated with an industrial process. Each interface can request a copy of the superset, from which the required tags are selected. The controller receives the requested tags from all of the interfaces and combines the requested tags into a single tagset, for a given update rate, comprising the various parameters associated with the tags. At the selected update rate, the tagset is forwarded to the interfaces. A masterset can be utilized to identify the sequence of tags in a tagset and check code can ensure continuity of the tags in the tagset.

Abstract: Systems and methods are provided to facilitate receipt of tag requests from one or more interfaces, based upon which a single tagset is compiled at a controller comprising all the requested tags for a given update rate, whereupon the single compiled tagset is subsequently forwarded to the one or more interfaces. A controller generates a superset of tags associated with an industrial process. Each interface can request a copy of the superset, from which the required tags are selected. The controller receives the requested tags from all of the interfaces and combines the requested tags into a single tagset, for a given update rate, comprising the various parameters associated with the tags. At the selected update rate, the tagset is forwarded to the interfaces. A masterset can be utilized to identify the sequence of tags in a tagset and check code can ensure continuity of the tags in the tagset.

Abstract: Systems and methods are provided to facilitate correct execution of a machine jog operation where a plurality of interfaces can generate a machine jog command, which is received by an industrial controller. One or more machine jog commands can be received and state data is maintained regarding whether a machine jog command has been received. An OR gate logic operation is performed on the state data to determine whether a machine jog operation has been received from any of the plurality of interfaces, and in the event of receiving a machine jog operation, a control command is generated to effect a machine jog operation. The plurality of interfaces enable interaction with the controller, to facilitate control of a machine from a plurality of locations. The system can be expanded to include further interfaces. Also, information regarding a machine jog command can be published to the plurality of interfaces.

Abstract: Systems and methods are provided to facilitate correct execution of a machine jog operation where a plurality of interfaces can generate a machine jog command, which is received by an industrial controller. One or more machine jog commands can be received and state data is maintained regarding whether a machine jog command has been received. An OR gate logic operation is performed on the state data to determine whether a machine jog operation has been received from any of the plurality of interfaces, and in the event of receiving a machine jog operation, a control command is generated to effect a machine jog operation. The plurality of interfaces enable interaction with the controller, to facilitate control of a machine from a plurality of locations. The system can be expanded to include further interfaces. Also, information regarding a machine jog command can be published to the plurality of interfaces.