Patents by Inventor Joseph P. Lorenzo

Joseph P. Lorenzo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6380097
    Abstract: An aqueous thiourea-ammonia treatment is used to form a thin sulfurous film at the indium phosphide surface, having a thickness of less than one nanometer. The thiourea-ammonium hydroxide treatment can be used as is or immediately prior to deposition of cadmium sulfide for enhanced surface passivation. The thiourea-ammonium hydroxide treatment is entirely compatible with chemical bath deposition, molecular beam epitaxy, or metalorganic chemical vapor deposition of the cadmium sulfide.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: April 30, 2002
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Helen M. Dauplaise, Andrew Davis, Kenneth Vaccaro, Joseph P. Lorenzo
  • Patent number: 6049099
    Abstract: A novel indium phosphide (InP) based heterojunction bipolar transistor (HBT) is described. A II-VI compound, cadmium sulfide (CdS), is used as the emitter to improve the emitter injection efficiency and reduce recombination losses. The cadmium sulfide emitter is applied following the epitaxial growth of III-V compound collector and base regions. The large valence band discontinuity (.quadrature.E=0.75 eV) between CdS and InP allows InP to be used for both the base and collector material. Prior to cadmium sulfide deposition, the exposed surfaces of the epitaxial layers can be passivated with sulfur, further reducing the recombination losses.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: April 11, 2000
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Kenneth Vaccaro, Helen M. Dauplaise, Andrew Davis, Joseph P. Lorenzo
  • Patent number: 5689125
    Abstract: In a Schottky metal junction semiconductor device, a CdS interface layer, having a thickness of under 100 angstroms, is positioned under the Schottky barrier gate of a III-V HEMT, for reducing gate leakage, and for enabling full depletion of the conducting channel. A similar layer is positioned under the insulator of an MIS device having an InP substrate. The CdS layers are deposited from a chemical bath which merely entails a simple, safe and readily controllable additional step in the otherwise conventional manufacturing process of these devices.
    Type: Grant
    Filed: June 12, 1995
    Date of Patent: November 18, 1997
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Kenneth Vaccaro, Andrew Davis, Helen M. Dauplaise, Joseph P. Lorenzo
  • Patent number: 5608255
    Abstract: A photo FET device having a large area backside optical energy reception surface is disclosed. The photo FET device is fabricated in the source gate and drain upward configuration using a lattice determining surrogate substrate and a mesa-forming deep etch processing sequence and then inverted onto a new permanent substrate member and the surrogate substrate member removed in order to expose the active area backside optical energy reception surface. Fabrication of the device from two possible indium-inclusive semiconductor materials and a particular gate metal alloy is also disclosed.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: March 4, 1997
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Eric A. Martin, Kenneth Vaccaro, William Waters, Joseph P. Lorenzo, Stephen Spaziani
  • Patent number: 5557120
    Abstract: A full wafer to full wafer integrated circuit apparatus wherein substrate removal and replacement on one wafer has been used to enable an accurate alignment of this wafer with features of a receiving wafer during a see through alignment step. The invention is disclosed in terms of a wafer of photo field effect transistors being combined with a wafer of circuit devices that attend the photo feed effect transistor devices. Use of the invention with the different material combination option desired for a photodetector device and its attending circuitry is also disclosed. Advantages over the more conventional chip by chip combination of wafer devices are also disclosed.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: September 17, 1996
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Eric A. Martin, Kenneth Vaccaro, Joseph P. Lorenzo, Andrew Davis
  • Patent number: 5541438
    Abstract: An improved Metal Semiconductor Metal (MSM) photodiode device and a fabrication process for realizing this device. The improved photodiode device employs frontside electrodes and backside illumination to avoid active area shadowing in the device. This configuration is achieved through a device fabrication sequence which involves substrate removal--and replacement at the device's opposed frontside surface using such media as an epoxy adhesive. The disclosed device uses gallium arsenide semiconductor materials that are lattice determined by an indium phosphide sacrificial initial substrate, in order to select a desired input energy spectral range.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: July 30, 1996
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Eric A. Martin, Kenneth Vaccaro, Joseph P. Lorenzo
  • Patent number: 5532173
    Abstract: A photo FET device having a large area backside optical energy reception surface is disclosed. The photo FET device is fabricated in the source gate and drain upward configuration using a lattice determining surrogate substrate and a mesa-forming deep etch processing sequence and then inverted onto a new permanent substrate member and the surrogate substrate member removed in order to expose the active area backside optical energy reception surface. Fabrication of the device from two possible indium-inclusive semiconductor materials and a particular gate metal alloy is also disclosed.
    Type: Grant
    Filed: July 14, 1994
    Date of Patent: July 2, 1996
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Eric A. Martin, Kenneth Vaccaro, William Waters, Joseph P. Lorenzo, Stephen Spaziani
  • Patent number: 5494833
    Abstract: An improved Metal Semiconductor Metal (MSM) photodiode device and a fabrication process for realizing this device. The improved photodiode device employs frontside electrodes and backside illumination to avoid active area shadowing in the device. This configuration is achieved through a device fabrication sequence which involves substrate removal--and replacement at the device's opposed frontside surface using such media as an epoxy adhesive. The disclosed device uses gallium arsenide semiconductor materials that are lattice determined by an indium phosphide sacrificial initial substrate, in order to select a desired input energy spectral range.
    Type: Grant
    Filed: July 14, 1994
    Date of Patent: February 27, 1996
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Eric A. Martin, Kenneth Vaccaro, Joseph P. Lorenzo
  • Patent number: 5472914
    Abstract: A full wafer to full wafer integrated circuit fabrication process wherein substrate removal and replacement of one wafer is used to enable an accurate alignment of this wafer with features of a receiving wafer during a see through alignment step. The invention is disclosed in terms of a wafer of photo field effect transistors being combined with a wafer of circuit devices that attend the photo field effect transistor devices. Use of the invention with the different material combination option desired for a photodetector device and its attending circuitry is also disclosed. Advantages over the more conventional chip by chip combination of wafer devices are also disclosed.
    Type: Grant
    Filed: July 14, 1994
    Date of Patent: December 5, 1995
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Eric A. Martin, Kenneth Vaccaro, Joseph P. Lorenzo, Andrew Davis
  • Patent number: 5354709
    Abstract: The invention comprises processes and heterostructure products defining silicon on insulator waveguides (80, 88, 90, 106, 112, 120, 122) that are suitable for use with light in the 1.3, 1.6 .mu.m or greater wavelengths. Silicon is deposited on an insulator layer 12 on a crystalline substrate 10 and grown or regrown in crystalline form. The silicon is then etched or formed into a waveguide structures.
    Type: Grant
    Filed: April 11, 1991
    Date of Patent: October 11, 1994
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Joseph P. Lorenzo, Richard A. Soref
  • Patent number: 5163118
    Abstract: The invention comprises processes and heterostructure products defining silicon on insulator waveguides (80, 88, 90, 106, 112, 120, 122) that are suitable for use with light in the 1.3, 1.6 .mu.m or greater wavelengths. Silicon is deposited on an insulator layer 12 on a crystalline substrate 10 and grown or regrown in crystalline form. The silicon is then etched or formed into a waveguide structures.
    Type: Grant
    Filed: August 26, 1988
    Date of Patent: November 10, 1992
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Joseph P. Lorenzo, Richard A. Soref
  • Patent number: 4900591
    Abstract: The invention comprises a pyrolytic process for the deposition of high quality silicon dioxide at temperatures of 100.degree.-330.degree. C. Deposition is achieved by reacting silane and oxygen in the 2-12 torr pressure range, yielding deposition rates of 140 .ANG./min at 300.degree. C. and 50 .ANG./min at 120.degree. C. Measurements of refractive index (1.45-1.46), field strength (3-10.times.10.sup.6 V/cm), and resistivity (10.sup.13 -10.sup.15 -cm) indicate that the oxides are near stoichiometric SiO.sub.2. This technology appears promising the Group IV and Group III-V device applications.
    Type: Grant
    Filed: January 20, 1988
    Date of Patent: February 13, 1990
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Brian R. Bennett, Joseph P. Lorenzo, Kenneth Vaccaro
  • Patent number: 4884112
    Abstract: The invention comprises integral all silicon light sources and 3-D optical waveguides which combine the functions of room temperature optical emission and optical signal routing. Several light emitting electrooptical silicon devices are herein disclosed. Light emitted by silicon LEDs is concentrated in channels (waveguides) and is directed to desired locations on a silicon wafer. In all of the devices, the light source is electrically actuated by a forward biased p-n junction and the light intensity can be electrically controlled by varying the applied current.
    Type: Grant
    Filed: March 18, 1988
    Date of Patent: November 28, 1989
    Assignee: The United States of America as repressented by the Secretary of the Air Force
    Inventors: Joseph P. Lorenzo, Richard A. Soref
  • Patent number: 4877299
    Abstract: This invention describes an infrared lightwave modulation and switching aratus for very rapidly changing the refractive index of a light-transmitting, doped, semiconductor waveguide. Electrical control is exerted by a MIS diode or MISFET. The apparatus includes a transparent crystalline silicon waveguide, an electrically insulating dielectric layer overlaying a portion of that waveguide, and an elongated, conductive gate electrode in contact with the insulator. A gate voltage applied between the semiconductor and gate serves to deplete free charge carriers from the region of the waveguide under the gate. Elongated source and drain electrodes may be added to enhance electro-optic control.
    Type: Grant
    Filed: March 15, 1989
    Date of Patent: October 31, 1989
    Assignee: United States of America as represented by the Secretary of the Air Force
    Inventors: Joseph P. Lorenzo, Richard A. Soref
  • Patent number: 4857973
    Abstract: The invention comprises a Schottky barrier type infrared photodetector which is monolithically integrated on a silicon waveguide. A Schottky barrier contact is positioned directly on a silicon waveguide to absorb grazing incidence optical signals passing through the waveguide. The Schottky contact is operated in the avalanche or reverse bias mode to generate a useable electrical signal.
    Type: Grant
    Filed: May 14, 1987
    Date of Patent: August 15, 1989
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Andrew C. Yang, Joseph P. Lorenzo, Richard A. Soref
  • Patent number: 4789642
    Abstract: A method of fabricating low loss silicon optical waveguides by high energy ion implantation which converts a buried region into dielectric material. The top silicon surface can them be etched or formed into waveguides that are isolated by the buried dielectric. Annealing of the top silicon layer can be used to improve optical quality and additional silicon can be added to the top surface waveguides by epitaxial growth.
    Type: Grant
    Filed: March 26, 1987
    Date of Patent: December 6, 1988
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Joseph P. Lorenzo, Richard A. Soref
  • Patent number: 4787691
    Abstract: All silicon electrooptic devices for modulating and switching of guided light have been developed using the silicon-on-insulator approach. Generally, p-n junctions are formed in a silicon waveguide to selectively modulate and direct light by carrier refraction. An electrooptic phase modulator and several 2.times.2 electrooptic switches are described. The devices are particularly useful for manipulating light signals in the 1.3-1.6 micron range.
    Type: Grant
    Filed: March 26, 1987
    Date of Patent: November 29, 1988
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Joseph P. Lorenzo, Richard A. Soref
  • Patent number: 4746183
    Abstract: An electrically controlled integrated optical switch having a body made up entirely of crystalline silicon. More specifically, the body has a pair of channel waveguides intersecting in an X-like configuration forming therein an intersection crossover region. A first electrode is positioned on the intersection crossover region and a second electrode is positioned on the bottom of the body opposite the intersection crossover region. A controllable current/voltage source is electrically connected to the electrodes in order to alter the index of refraction of the intersection crossover region by carrier injection in order to selectively switch optical signals between diverging waveguides.
    Type: Grant
    Filed: May 18, 1987
    Date of Patent: May 24, 1988
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Richard A. Soref, Joseph P. Lorenzo
  • Patent number: 4728167
    Abstract: An electrically controlled integrated optical switch having a body made up entirely of crystalline silicon. More specifically, the body has a pair of channel waveguides intersecting in an X-like configuration forming therein an intersection crossover region. A first electrode is positioned on the intersection crossover region and a second electrode is positioned on the bottom of the body opposite the intersection crossover region. A controllable current/voltage source is electrically connected to the electrodes in order to alter the index of refraction of the intersection crossover region in order to change the amount of optical cross coupling of light between the intersecting waveguides.
    Type: Grant
    Filed: February 24, 1986
    Date of Patent: March 1, 1988
    Assignee: The United States of America as represented by the Secretary of the Air Force.
    Inventors: Richard A. Soref, Joseph P. Lorenzo
  • Patent number: 4693547
    Abstract: An optically controlled integrated optical switch having a body made up of entirely crystalline silicon. More specifically, the body has a pair of channel waveguides intersecting at an X-like configuration forming therein an intersection crossover region. An electrically controlled optical source is positioned over the crossover region to shine intense, short wavelight on the crossover region in order to generate numerous electron-hole pairs in the waveguide material. These charge carriers alter the refractive index of the intersection region. A controllable current source is used to adjust the optical output power of the optical source. This, in turn, changes the amount of optical cross coupling of light between the intersecting waveguides.
    Type: Grant
    Filed: February 24, 1986
    Date of Patent: September 15, 1987
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Richard A. Soref, Joseph P. Lorenzo