Abstract: Presented is a control system and method for minimizing the adverse affects resulting from conventional hysteretic current control of power inverters, and an uninterruptible power supply using same. The system of the present invention uses control circuitry for monitoring and classifying the PWM switching events commanded by conventional hysteretic current control and adjusting the dead time delay injected based on these PWM events. Preferably, the control circuitry uses a minimum delay dead time component to preclude the possibility of a shoot through condition from occurring, and also includes a frequency control component of the total dead time delay. In one embodiment this frequency control component may vary in proportion to the switching frequency commanded by the hysteretic current control loop. In an alternate embodiment, the PWM switching events are classified into differing modes of operation, during which a particular fixed frequency control dead time delay is selected.

Abstract: A charging control circuit for severe battery conditions and an uninterruptible power supply (UPS) system including same are presented. The charging control circuit utilizes both hardware and microprocessor control to allow the UPS to start with depleted or no batteries installed. Initially, the hardware control loops regulate DC bus voltage generation to charge the batteries to a safe level to allow the UPS housekeeping circuitry to wake up and assume control of the UPS operation. Once the microprocessor has awoken, it assumes control of the DC bus and charging of the batteries. If no batteries are installed, the hardware control loop utilizes a fast responding voltage mode control to regulate the DC bus, while a microprocessor-based current mode control is used when batteries are installed. Hardware over voltage control and microprocessor shut off control is also provided.

Abstract: Presented is a single-stage power converter topology allowing for power factor correction during operation. The topology utilizes an integration of Ćuk converter and single-ended primary inductance converter (SEPIC) topologies to provide AC-to-AC, AC-to-DC, DC-to-AC, and AC/DC-to-AC operation. Shared use of the Ćuk converter's output inductor by the SEPIC-type circuit elements provides continuous output current, typically unknown to a SEPIC converter. Application of the single-stage power converter topologies may be had in a line conditioner circuit, a battery charger circuit, and as an uninterruptible power supply (UPS).

Abstract: Presented is a single-stage power converter topology allowing for power factor correction during operation. The topology utilizes an integration of Ćuk converter and single-ended primary inductance converter (SEPIC) topologies to provide AC-to-AC, AC-to-DC, DC-to-AC, and AC/DC-to-AC operation. Shared use of the Ćuk converter's output inductor by the SEPIC-type circuit elements provides continuous output current, typically unknown to a SEPIC converter. Application of the single-stage power converter topologies may be had in a line conditioner circuit, a battery charger circuit, and as an uninterruptible power supply (UPS).

Abstract: A charging control circuit for severe battery conditions and an uninterruptible power supply (UPS) system including same are presented. The charging control circuit utilizes both hardware and microprocessor control to allow the UPS to start with depleted or no batteries installed. Initially, the hardware control loops regulate DC bus voltage generation to charge the batteries to a safe level to allow the UPS housekeeping circuitry to wake up and assume control of the UPS operation. Once the microprocessor has awoken, it assumes control of the DC bus and charging of the batteries. If no batteries are installed, the hardware control loop utilizes a fast responding voltage mode control to regulate the DC bus, while a microprocessor-based current mode control is used when batteries are installed. Hardware over voltage control and microprocessor shut off control is also provided.

Abstract: Presented is a control system and method for minimizing the adverse affects resulting from conventional hysteretic current control of power inverters, and an uninterruptible power supply using same. The system of the present invention uses control circuitry for monitoring and classifying the PWM switching events commanded by conventional hysteretic current control and adjusting the dead time delay injected based on these PWM events. Preferably, the control circuitry uses a minimum delay dead time component to preclude the possibility of a shoot through condition from occurring, and also includes a frequency control component of the total dead time delay. In one embodiment this frequency control component may vary in proportion to the switching frequency commanded by the hysteretic current control loop. In an alternate embodiment, the PWM switching events are classified into differing modes of operation, during which a particular fixed frequency control dead time delay is selected.

Abstract: Presented is a modular uninterruptible power supply system utilizing common power modules, and providing redundant coordinated control thereof. The system and method of the instant invention provides identical control logic within each of the individual power modules, thus dispensing with the requirement for a separate control module to control and coordinate the operating modes and parameters of the UPS system. A system is presented whereby a virtual master is established through an arbitration scheme at initialization of the UPS system. The master then assigns a virtual vice master to provide the redundant back up control should the virtual master no longer be able to perform its functions. Nearly simultaneous control of operational mode and state change functions is accomplished through a coordinated communications system including a high-speed communications bus and digital control logic lines.

Abstract: A modular uninterruptible power supply is presented having multiple power modules installed therein. Each of the individual power modules contains an internal bypass circuit sized for its particular power module. Preferably internal bypass circuitry is sized to carry two per unit load. The system and method of the invention also includes internal control circuitry for each of the modular power modules that control transitions between the inverter and bypass modes of operation. This transition control is coordinated with the other controllers for the other modular power modules installed in the uninterruptible power supply. Both the high speed communication bus and a high level interrupt line are utilized to minimize the transfer break time between different modes of operation while ensuring that the inverter is never paralleled with the utility line voltage. To further minimize this transfer time, a solid state switching circuit is utilized to provide the initialization between operational modes.

Abstract: A printer for printing on a manually moved print medium. The printer may use thermal or inkjet printing and has user feedback and input. A roller-type position detector enables the printer to be used without a mechanical paper drive mechanism. The printer monitors the print medium as the print medium is propelled through the printer to identify when particular printing fields are aligned to the printhead. The printer then activates the printhead to print image portions in the printing fields. An alternative embodiment of the printer uses a flexible mounting of the printhead. In this embodiment, the paper roll diameter is determined in conjunction with monitoring the rotation of the paper roll to determine the position of the paper without requiring a roller-type position detector.

Abstract: An apparatus and method for controlling operation of a printer enables the transport rate of the print media to be coordinated with the print rate in order to precisely compensate for top-of-form and image stretch errors. The printer comprises a platen roller driven by a stepper motor to transport the print media in step increments. A print head is disposed in proximity to the platen roller so that the print media is transported therebetween by operation of the platen roller and step motor. A step rate control circuit for the printer comprises a clock adapted to provide a series of regular clock pulses at a fixed rate, and a first and a second counter respectively coupled to the clock for counting the clock pulses. The first counter provides a first interrupt signal with each of a first number of clock pulses which is provided to the stepper motor to cause the print media to be advanced by one step.

Abstract: A thermal printhead formed on a substrate. The plurality of thermal print elements in the thermal printhead are formed in a linear array. Each of the plurality of thermal print elements is respectively connected to a plurality of common electrode traces and a plurality of ground electrode traces. The common electrode traces are switchably connected to a single common electrode and the ground electrode traces are connected to a single ground electrode. The common electrode is held at a common voltage and the ground electrode is held at a ground voltage. The electrical circuit includes at least one common remote sense electrode connected to the single common electrode and, optionally, at least one ground remote sense electrode connected to the single ground electrode.

Abstract: A label gap detection circuit comprises a photosensor having a light emitting element disposed at a first side of the print media and a light receiving element disposed at a second side of the print media so that light emitted by the light emitting element passes through the print media. The light emitting element provides a signal corresponding to an amount of light emitted therefrom and the light receiving element provides a signal corresponding to an amount of light received thereon. A regulator is coupled to the light emitting element for controlling an amount of light emitted by the light emitting element in response to a sum of the signals from the light emitting element and the light receiving element. An analog-to-digital converter is coupled to the light receiving element to receive the signal therefrom and provide a binary value corresponding to an amount of light received by the light receiving element.

Abstract: A thermal printhead formed on a substrate. The plurality of thermal print elements in the thermal printhead are formed in a linear array. Each of the plurality of thermal print elements is respectively connected to a plurality of common electrode traces and a plurality of ground electrode traces. The common electrode traces are switchably connected to a single common electrode and the ground electrode traces are connected to a single ground electrode. The common electrode is held at a common voltage and the ground electrode is held at a ground voltage. The electrical circuit includes at least one common remote sense electrode connected to the single common electrode and, optionally, at least one ground remote sense electrode connected to the single ground electrode.