Patents by Inventor Joseph Rabinowicz

Joseph Rabinowicz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9116701
    Abstract: A memory unit comprises at least two volatile memory elements, analyzing circuitry and power gate. The memory elements may for example be latches, flip-flops, or registers. Each of the memory elements has at least two different states including a predefined reset state. The analyzing circuitry generates a power-down enable signal in response to each of the memory elements being in its reset state. The power gate powers down the memory elements in response to the power-down enable signal. The memory elements may be arranged to assume their reset states upon powering up the memory unit.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: August 25, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael Priel, Joseph Rabinowicz, Anton Rozen
  • Publication number: 20130097449
    Abstract: A memory unit comprises at least two volatile memory elements, analyzing circuitry and power gate. The memory elements may for example be latches, flip-flops, or registers. Each of the memory elements has at least two different states including a predefined reset state. The analyzing circuitry generates a power-down enable signal in response to each of the memory elements being in its reset state. The power gate powers down the memory elements in response to the power-down enable signal. The memory elements may be arranged to assume their reset states upon powering up the memory unit.
    Type: Application
    Filed: June 11, 2010
    Publication date: April 18, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Michael Priel, Joseph Rabinowicz, Anton Rozen