Patents by Inventor Joseph Reid Henrichs

Joseph Reid Henrichs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8545621
    Abstract: Using a helium cryostat, the temperature for a substrate wafer(s) is reduced to 2.2 Kelvin over a period of twenty-four hours. Next, a soak segment will hold the temperature of the substrate wafer at 2.2 Kelvins for a period of ninety-six hours. At these low temperatures, alloys such as GaAs, InP, and GaP will form dipole molecular moments, which will re-align along lines of internal magnetic force as molecular bonds condense. Next the substrate wafer's temperature is ramped up to room temperature over a period of twenty-four hours. Next, the temperature of the substrate wafer is ramped up to assure that the temperature gradients made to occur within the wafer are kept low. Typically, a temper ramp up temperature will range between 300° F. to 1100° F. and depends upon the single crystal material used to construct the substrate wafer. Next, the substrate wafer undergoes a temper hold segment, which assures that the entire substrate wafer has had the benefit of the tempering temperature.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: October 1, 2013
    Assignee: OPC Laser Systems LLC
    Inventor: Joseph Reid Henrichs
  • Publication number: 20100279446
    Abstract: A phase-conjugating resonator that includes a semiconductor laser diode apparatus that comprises a phase-conjugating array of retro-reflecting hexagon apertured hexahedral shaped corner-cube prisms, an electrically and/or optically pumped gain-region, a distributed bragg reflecting mirror-stack, a gaussian mode providing hemispherical shaped laser-emission-output metalized mirror. Wherein, optical phase conjugation is used to neutralize the phase perturbating contribution of spontaneous-emission, acoustic phonons, quantum-noise, gain-saturation, diffraction, and other intracavity aberrations and distortions that typically destabilize any stimulated-emission made to undergo amplifying oscillation within the inventions phase-conjugating resonator. Resulting in stablized high-power laser-emission-output into a single low-order fundamental transverse cavity mode and reversal of intra-cavity chirp that provides for high-speed internal modulation capable of transmitting data at around 20-Gigabits/ps.
    Type: Application
    Filed: December 2, 2009
    Publication date: November 4, 2010
    Inventor: Joseph Reid Henrichs
  • Patent number: 7782731
    Abstract: An optical data-storage hard disk drive that uses stationary Phase-Change Microhead Array Chips in place of conventional flying-heads, rotary voice-coil actuators, or other similar types of servo-tracking mechanisms to simultaneously record and/or reproduce data to and/or from a multitude of data-tracks located across the data-surfaces of a multitude of phase-change based disc media using a multitude of microheads.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: August 24, 2010
    Inventor: Joseph Reid Henrichs
  • Patent number: 7738522
    Abstract: A phase-conjugating resonator that includes a semiconductor laser diode apparatus that comprises a phase-conjugating array of retro-reflecting hexagon apertured hexahedral shaped corner-cube prisms, an electrically and/or optically pumped gain-region, a distributed bragg reflecting mirror-stack, a gaussian mode providing hemispherical shaped laser-emission-output metalized mirror. Wherein, optical phase conjugation is used to neutralize the phase perturbating contribution of spontaneous-emission, acoustic phonons, quantum-noise, gain-saturation, diffraction, and other intracavity aberrations and distortions that typically destabilize any stimulated-emission made to undergo amplifying oscillation within the inventions phase-conjugating resonator. Resulting in stabilized high-power laser-emission-output into a single low-order fundamental transverse cavity mode and reversal of intra-cavity chirp that provides for high-speed internal modulation capable of transmitting data at around 20-Gigabits/ps.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: June 15, 2010
    Inventor: Joseph Reid Henrichs
  • Publication number: 20090273839
    Abstract: A method that provides for a phase conjugate mirror 10 having a gallium-arsenide substrate 11 with a generally cubic crystalline lattice and a number of gallium-arsenide crystal projections 14 extending from said substrate 11, the projections each having three generally planar surfaces 15, 16, 17, where the surfaces each being generally obliquely oriented with respect to a plane of said substrate 11, the plane substantially corresponding to a (111) crystal face, the projections 14 being oriented along the plane 13 to provide a predetermined corner-cube array pattern 10, the device including a number of implant sites 25 spaced apart from one another along the substrate 11 to define a pattern 40, and forming a number of corner-cubes articles having a shape substantially corresponding to the corner-cube array 10 pattern 40, wherein the articles each have a number of cube-corner projections 14 spaced apart from each other by a minimum distance of 1 micron.
    Type: Application
    Filed: April 30, 2008
    Publication date: November 5, 2009
    Inventor: Joseph Reid Henrichs
  • Publication number: 20090162948
    Abstract: Using a helium cryostat, the temperature for a substrate wafer(s) is reduced to 2.2 Kelvin over a period of twenty-four hours. Next, a soak segment will hold the temperature of the substrate wafer at 2.2 Kelvins for a period of ninety-six hours. At these low temperatures, alloys such as GaAs, InP, and GaP will form dipole molecular moments, which will re-align along lines of internal magnetic force as molecular bonds condense. Next the substrate wafer's temperature is ramped up to room temperature over a period of twenty-four hours. Next, the temperature of the substrate wafer is ramped up to assure that the temperature gradients made to occur within the wafer are kept low. Typically, a temper ramp up temperature will range between 300° F. to 1100° F. and depends upon the single crystal material used to construct the substrate wafer. Next, the substrate wafer undergoes a temper hold segment, which assures that the entire substrate wafer has had the benefit of the tempering temperature.
    Type: Application
    Filed: February 10, 2009
    Publication date: June 25, 2009
    Inventor: Joseph Reid Henrichs
  • Patent number: 7504345
    Abstract: Using a helium cryostat, the temperature for a substrate wafer(s) is reduced to 2.2 Kelvin over a period of twenty-four hours. Next, a soak segment will hold the temperature of the substrate wafer at 2.2 Kelvin for a period of ninety-six hours. At these low temperatures, alloys such as GaAs, InP, and GaP will form dipole molecular moments, which will re-align along lines of internal magnetic force as molecular bonds condense. Next the substrate wafer's temperature is ramped up to room temperature over a period of twenty-four hours. Next, the temperature of the substrate wafer is ramped up to assure that the temperature gradients made to occur within the wafer are kept low. Next, the substrate wafer undergoes a temper hold segment, which assures that the entire substrate wafer has had the benefit of the tempering temperature.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: March 17, 2009
    Assignee: OPC Laser Systems LLC
    Inventor: Joseph Reid Henrichs
  • Publication number: 20080305560
    Abstract: Using a helium cryostat, the temperature for a substrate wafer(s) is reduced to 2.2 Kelvin over a period of twenty-four hours. Next, a soak segment will hold the temperature of the substrate wafer at 2.2 Kelvins for a period of ninety-six hours. At these low temperatures, alloys such as GaAs, InP, and GaP will form dipole molecular moments, which will re-align along lines of internal magnetic force as molecular bonds condense. Next the substrate wafer's temperature is ramped up to room temperature over a period of twenty-four hours. Next, the temperature of the substrate wafer is ramped up to assure that the temperature gradients made to occur within the wafer are kept low. Typically, a temper ramp up temperature will range between 300° F. to 1100° F. and depends upon the single crystal material used to construct the substrate wafer. Next, the substrate wafer undergoes a temper hold segment, which assures that the entire substrate wafer has had the benefit of the tempering temperature.
    Type: Application
    Filed: June 6, 2007
    Publication date: December 11, 2008
    Inventor: Joseph Reid Henrichs
  • Patent number: 7376169
    Abstract: A phase-conjugating resonator that includes a semiconductor laser diode apparatus that comprises a phase-conjugating array of retro-reflecting hexagon apertured hexahedral shaped corner-cube prisms, an electrically and/or optically pumped gain-region, a distributed bragg reflecting mirror-stack, a gaussian mode providing hemispherical shaped laser-emission-output metalized mirror. Wherein, optical phase conjugation is used to neutralize the phase perturbating contribution of spontaneous-emission, acoustic phonons, quantum-noise, gain-saturation, diffraction, and other intracavity aberrations and distortions that typically destabilize any stimulated-emission made to undergo amplifying oscillation within the inventions phase-conjugating resonator. Resulting in stablized high-power laser-emission-output into a single low-order fundamental transverse cavity mode and reversal of intracavity chirp that provides for high-speed internal modulation capable of transmitting data at around 20-Gigabits/ps.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: May 20, 2008
    Inventor: Joseph Reid Henrichs
  • Patent number: 6885688
    Abstract: A semiconductor laser, such as surface emitting laser, is disclosed. According to one embodiment, the laser includes a first reflector assembly having an upper face, a second reflector assembly having a lower face that faces the upper face of the first reflector assembly, and a phase conjugator between the first and second reflector assemblies. The phase conjugator includes a first semiconductor active region parallel to the upper face of the first reflector assembly and the lower face of the second reflector assembly, a second semiconductor active region that is not parallel to first semiconductor active region, and a third semiconductor active region that is not parallel to the first semiconductor active region.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: April 26, 2005
    Inventor: Joseph Reid Henrichs
  • Patent number: 6879615
    Abstract: A “Folded Cavity Surface Emitting Laser” (FCSEL) sum frequency generating device capable of generating a second harmonic at room temperatures with high efficiency and output power, while having a small size, low energy consumption, and a low manufacturing cost. A FCSEL sum frequency generating semiconductor diode laser has a multilayered structure that comprises a mode discriminating polyhedral shaped prism waveguide, which is located at one end of two light emitting diodes, a partial photon reflecting mirror, which is located at the opposite end of the two light emitting diodes, and a phase-matching sum-frequency generating superlattice, which is located between the polyhedral shaped prism waveguide and the partial photon reflecting mirror.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: April 12, 2005
    Inventor: Joseph Reid Henrichs
  • Patent number: 6819701
    Abstract: Super-luminescent (FCLED) “Folded Cavity Light Emitting Diode” comprising a cavity folding waveguide (34) that has at least one total internal reflecting prism (34 A), which provides for a redirection of intra-cavity produced fundamental photonic radiation (40 A) from a longitudinal propagation (40 B) into a transverse propagation (40° C.), and back into a longitudinal (40 E) yet reversed propagation (40° F.) defining a folded cavity, an active-region (36) that comprises an active-area (36 B) defining spontaneous-emission of photonic radiation, and a photon collimating window emitter-layer (38), which is capable of collimating and focusing sufficient undiffused optical radiation into a propagation direction away from the present invention's optically folded vertical cavity.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: November 16, 2004
    Inventor: Joseph Reid Henrichs
  • Patent number: 6792026
    Abstract: (FCSSL) “Folded Cavity Solid-State Laser” comprising a waveguide (35) having at least one total internal reflecting prism (35A) constructed from ion-implanted laser-active material defining a folded cavity, wherein augmentation of intra-cavity produced photonic-radiation occurs during its redirection (42A) from a longitudinal propagation (42B) into a transverse propagation (42C) and back into a longitudinal propagation (42E) within the waveguide (35), an active-region (37) defining a gain-medium that provides stimulated-emission of the spontaneous-emission provided by an electrically pumped active-area (37B), a dichroic-mirror (39) providing feedback and the semi-reflected output of photonic radiation that further defines a vertical cavity.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: September 14, 2004
    Inventor: Joseph Reid Henrichs
  • Publication number: 20040066821
    Abstract: A semiconductor laser, such as surface emitting laser, is disclosed. According to one embodiment, the laser includes a first reflector assembly having an upper face, a second reflector assembly having a lower face that faces the upper face of the first reflector assembly, and a phase conjugator between the first and second reflector assemblies. The phase conjugator includes a first semiconductor active region parallel to the upper face of the first reflector assembly and the lower face of the second reflector assembly, a second semiconductor active region that is not parallel to first semiconductor active region, and a third semiconductor active region that is not parallel to the first semiconductor active region.
    Type: Application
    Filed: September 22, 2003
    Publication date: April 8, 2004
    Inventor: Joseph Reid Henrichs
  • Patent number: 6704336
    Abstract: A semiconductor laser diode comprising a light emitting diode, a polyhedral prism waveguide, and a single or multilayered partial-reflecting mirror. The polyhedral prism waveguide and the partial-reflecting mirror are located on opposite sides of the light emitting diode. A polyhedral prism waveguide increases modal discrimination within semiconductor laser diode's optical-feedback providing cavity by using total internal reflection to redirect intra-cavity produced light from a longitudinal propagation into a first transverse propagation, into a second transverse propagation, into a third transverse propagation, and then back into a longitudinal, but reversed propagation.
    Type: Grant
    Filed: July 22, 2000
    Date of Patent: March 9, 2004
    Inventor: Joseph Reid Henrichs
  • Publication number: 20030185265
    Abstract: Super-luminescent (FCLED) “Folded Cavity Light Emitting Diode” comprising a cavity folding waveguide (34) that has at least one total internal reflecting prism (34A), which provides for a redirection of intra-cavity produced fundamental photonic radiation (40A) from a longitudinal propagation (40B) into a transverse propagation (40C), and back into a longitudinal (40E) yet reversed propagation (40F) defining a folded cavity, an active-region (36) that comprises an active-area (36B) defining spontaneous-emission of photonic radiation, and a photon collimating window emitter-layer (38), which is capable of collimating and focusing sufficient undiffused optical radiation into a propagation direction away from the present invention's optically folded vertical cavity.
    Type: Application
    Filed: March 26, 2002
    Publication date: October 2, 2003
    Inventor: Joseph Reid Henrichs
  • Publication number: 20030185266
    Abstract: (FCSSL) “Folded Cavity Solid-State Laser” comprising a waveguide (35) having at least one total internal reflecting prism (35A) constructed from ion-implanted laser-active material defining a folded cavity, wherein augmentation of intra-cavity produced photonic-radiation occurs during its redirection (42A) from a longitudinal propagation (42B) into a transverse propagation (42C) and back into a longitudinal propagation (42E) within the waveguide (35), an active-region (37) defining a gain-medium that provides stimulated-emission of the spontaneous-emission provided by an electrically pumped active-area (37B), a dichroic-mirror (39) providing feedback and the semi-reflected output of photonic radiation that further defines a vertical cavity.
    Type: Application
    Filed: March 26, 2002
    Publication date: October 2, 2003
    Inventor: Joseph Reid Henrichs
  • Patent number: 6625195
    Abstract: The present invention is a “Vertical Cavity Surface Emitting Laser” or “VCSEL” design, wherein the VCSEL device produces phase-conjugated distortion free (reversal of intracavity distortions like diffraction, divergence, and light scattering) and collimated (plane-parallel phase fronts) laser-light emissions. Moreover, through what is called intracavity degenerative four-wave mixing (called four-wave mixing because traditionally there are four frequencies of phase-matched laser light involved in the phase-conjugate process), that occurs within the nonlinear materials of the “Phase Conjugated Vertical Cavity Surface Emitting Laser” or “PCVCSEL” device's vertical-cavity.
    Type: Grant
    Filed: July 20, 1999
    Date of Patent: September 23, 2003
    Inventor: Joseph Reid Henrichs
  • Publication number: 20030160254
    Abstract: A “Folded Cavity Surface Emitting Laser” (FCSEL) sum frequency generating device capable of generating a second harmonic at room temperatures with high efficiency and output power, while having a small size, low energy consumption, and a low manufacturing cost. A FCSEL sum frequency generating semiconductor diode laser has a multilayered structure that comprises a mode discriminating polyhedral shaped prism waveguide, which is located at one end of two light emitting diodes, a partial photon reflecting mirror, which is located at the opposite end of the two light emitting diodes, and a phase-matching sum-frequency generating superlattice, which is located between the polyhedral shaped prism waveguide and the partial photon reflecting mirror.
    Type: Application
    Filed: January 24, 2003
    Publication date: August 28, 2003
    Inventor: Joseph Reid Henrichs
  • Publication number: 20030161245
    Abstract: An optical data-storage hard disk drive that uses stationary Phase-Change Microhead Array Chips in place of conventional flying-heads, rotary voice-coil actuators, or other similar types of servo-tracking mechanisms to simultaneously record and/or reproduce data to and/or from a multitude of data-tracks located across the data-surfaces of a multitude of phase-change based disc media using a multitude of microheads.
    Type: Application
    Filed: July 23, 2002
    Publication date: August 28, 2003
    Inventor: Joseph Reid Henrichs