Patents by Inventor Joseph S. Cavallo
Joseph S. Cavallo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8424016Abstract: Briefly, techniques to manage interrupts and swaps of threads operating in critical region. In an embodiment, a thread is to be interrupted during a first critical region with an interrupt routine. The thread may be set to restart at a beginning of the first critical region in response to an indication that the thread is working in a critical region. Other embodiments are also claimed and disclosed.Type: GrantFiled: March 29, 2011Date of Patent: April 16, 2013Assignee: Intel CorporationInventor: Joseph S. Cavallo
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Patent number: 8074017Abstract: A method according to one embodiment may include creating a reserved partition on at least one volume of a RAID system. The method may also include creating a table to map data stored in the reserved partition to at least one intended volume address of at least one volume of the RAID system. The method may also include writing data associated with a RAID data write request into the cache memory, writing the data into the reserved partition, and updating the table to reflect data stored in the reserved partition.Type: GrantFiled: August 11, 2006Date of Patent: December 6, 2011Assignee: Intel CorporationInventor: Joseph S. Cavallo
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Publication number: 20110264836Abstract: Briefly, techniques to manage interrupts and swaps of threads operating in critical region.Type: ApplicationFiled: March 29, 2011Publication date: October 27, 2011Inventor: Joseph S. Cavallo
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Patent number: 7917910Abstract: Briefly, techniques to manage interrupts and swaps of threads operating in critical region. In an embodiment, a thread is to be interrupted during a first critical region with an interrupt routine. The thread may be set to restart at a beginning of the first critical region in response to an indication that the thread is working in a critical region. Other embodiments are also claimed and disclosed.Type: GrantFiled: March 26, 2004Date of Patent: March 29, 2011Assignee: Intel CorporationInventor: Joseph S. Cavallo
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Patent number: 7757238Abstract: Briefly, techniques to reduce the impact of interrupts and swaps on the completion time of tasks. In an embodiment, a code segment within a task adjusts the priority of the task. Other embodiments are also disclosed.Type: GrantFiled: June 29, 2004Date of Patent: July 13, 2010Assignee: Intel CorporationInventor: Joseph S. Cavallo
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Patent number: 7562188Abstract: Apparatus and systems, as well as methods and articles, may operate to sequence write operations and journal a portion of write data in a dual-parity redundant array of inexpensive disks (RAID) sub-system such that one or more parity strips in a stripe are consistent with target stripe data during the write operations, such that the consistency of the parity strips is determinant following an unexpected RAID sub-system reset occurring during the write operations, and such that the parity strips and the target stripe data are recoverable following a disk drive failure and a power failure occurring during the write operations.Type: GrantFiled: June 17, 2005Date of Patent: July 14, 2009Assignee: Intel CorporationInventor: Joseph S. Cavallo
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Publication number: 20090006745Abstract: Methods and apparatus relating to accessing snapshot data image of a data mirroring volume are described. In one embodiment, a host computer is allowed to access a first data volume and a second data volume. The second data volume may comprise data corresponding to a snapshot image of the first data volume prior to a suspension of data mirroring. Other embodiments are also disclosed.Type: ApplicationFiled: June 28, 2007Publication date: January 1, 2009Inventors: Joseph S. Cavallo, Brian Leete
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Publication number: 20090006744Abstract: Methods and apparatus relating to automated intermittent data mirroring volumes are described. In one embodiment, data mirroring may be suspended in response to occurrence of a scheduled or predefined event. Other embodiments are also disclosed.Type: ApplicationFiled: June 28, 2007Publication date: January 1, 2009Inventors: Joseph S. Cavallo, Brian Leete
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Patent number: 7441146Abstract: Apparatus and systems, as well as methods and articles, may operate to respond to a write request from a disk I/O process with write completion status from a RAID sub-system after writing update data associated with the write request to a data strip in a stripe associated with the RAID sub-system and before writing a parity strip update value to a parity strip in the stripe, a Q strip update value to a Q strip in the stripe, or both.Type: GrantFiled: June 10, 2005Date of Patent: October 21, 2008Assignee: Intel CorporationInventor: Joseph S. Cavallo
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Publication number: 20080040540Abstract: A method according to one embodiment may include creating a reserved partition on at least one volume of a RAID system. The method may also include creating a table to map data stored in the reserved partition to at least one intended volume address of at least one volume of the RAID system. The method may also include writing data associated with a RAID data write request into the cache memory, writing the data into the reserved partition, and updating the table to reflect data stored in the reserved partition.Type: ApplicationFiled: August 11, 2006Publication date: February 14, 2008Applicant: Intel CorporationInventor: Joseph S. Cavallo
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Patent number: 7257651Abstract: A method of detecting sequential data transfer requests, includes determining whether a first data transfer request crosses a boundary address, and, if it does, determining if the first data transfer request may be indicated as combinable with subsequent data transfer requests. The method may also include determining whether a previous data transfer request has been indicated as combinable, and if it has been indicated as combinable, determining that a new data transfer request is addressed adjacent to the previous data transfer request.Type: GrantFiled: March 11, 2004Date of Patent: August 14, 2007Assignee: Intel CorporationInventors: Joseph S. Cavallo, Stephen J. Ippolito
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Patent number: 6931486Abstract: A method of coalescing transfer requests, includes storing a transfer request on a pending list, determining that no previous transfer requests are being processed, combining at least two transfer requests as a combined data transfer and releasing the combined data transfer. The method may also include determining that the pending list is not empty before releasing the combined data transfer.Type: GrantFiled: November 2, 2001Date of Patent: August 16, 2005Assignee: Intel CorporationInventors: Joseph S. Cavallo, Stephen J. Ippolito
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Patent number: 6918020Abstract: In one embodiment, a method is provided. The method of this embodiment may include determining whether requested data is stored in a memory. If the requested data is not stored in the memory, the method may include determining whether a plurality of requests to access the requested data have occurred during a predetermined number of most recent data accesses. If the plurality of requests to access the requested data have occurred during the predetermined number of most recent data accesses, the method may also include storing the requested data in the memory. Of course, many variations, modifications, and alternatives are possible without departing from this embodiment.Type: GrantFiled: August 30, 2002Date of Patent: July 12, 2005Assignee: Intel CorporationInventors: Joseph S. Cavallo, Stephen J. Ippolito
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Publication number: 20040172491Abstract: A method of detecting sequential data transfer requests, includes determining whether a first data transfer request crosses a boundary address, and, if it does, determining if the first data transfer request may be indicated as combinable with subsequent data transfer requests. The method may also include determining whether a previous data transfer request has been indicated as combinable, and if it has been indicated as combinable, determining that a new data transfer request is addressed adjacent to the previous data transfer request.Type: ApplicationFiled: March 11, 2004Publication date: September 2, 2004Applicant: Intel Corporation, a Delaware corporationInventors: Joseph S. Cavallo, Stephen J. Ippolito
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Patent number: 6779053Abstract: A method of detecting sequential data transfer requests, includes determining whether a first data transfer request crosses a boundary address, and, if it does, determining if the first data transfer request may be indicated as combinable with subsequent data transfer requests. The method may also include determining whether a previous data transfer request has been indicated as combinable, and if it has been indicated as combinable, determining that a new data transfer request is addressed adjacent to the previous data transfer request.Type: GrantFiled: December 21, 2001Date of Patent: August 17, 2004Assignee: Intel CorporationInventors: Stephen J. Ippolito, Joseph S. Cavallo
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Publication number: 20040044864Abstract: In one embodiment, a method is provided. The method of this embodiment may include entering one mode of operation of first circuitry. In accordance with this one mode of operation, if an input/output (I/O) request is received by the first circuitry when the first circuitry is the one mode of operation, the first circuitry prevents the I/O request from being executed and stores the I/O request for future execution. The method of this embodiment may also include entering another mode of operation of the first circuitry. In this another mode of operation, the first circuitry may permit data stored in first storage associated with the first circuitry to be copied to second storage. The entry of the first circuitry into the another mode of operation may be based, at least in part, upon a determination by the first circuitry of whether second circuitry associated with third storage is ready to permit data stored in the third storage to be copied to the second storage.Type: ApplicationFiled: August 30, 2002Publication date: March 4, 2004Inventor: Joseph S. Cavallo
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Publication number: 20040044861Abstract: In one embodiment, a method is provided. The method of this embodiment may include determining whether requested data is stored in a memory. If the requested data is not stored in the memory, the method may include determining whether a plurality of requests to access the requested data have occurred during a predetermined number of most recent data accesses. If the plurality of requests to access the requested data have occurred during the predetermined number of most recent data accesses, the method may also include storing the requested data in the memory. Of course, many variations, modifications, and alternatives are possible without departing from this embodiment.Type: ApplicationFiled: August 30, 2002Publication date: March 4, 2004Inventors: Joseph S. Cavallo, Stephen J. Ippolito
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Publication number: 20030120837Abstract: A method of detecting sequential data transfer requests, includes determining whether a first data transfer request crosses a boundary address, and, if it does, determining if the first data transfer request may be indicated as combinable with subsequent data transfer requests. The method may also include determining whether a previous data transfer request has been indicated as combinable, and if it has been indicated as combinable, determining that a new data transfer request is addressed adjacent to the previous data transfer request.Type: ApplicationFiled: December 21, 2001Publication date: June 26, 2003Inventors: Stephen J. Ippolito, Joseph S. Cavallo
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Publication number: 20030088734Abstract: A method of coalescing transfer requests, includes storing a transfer request on a pending list, determining that no previous transfer requests are being processed, combining at least two transfer requests as a combined data transfer and releasing the combined data transfer. The method may also include determining that the pending list is not empty before releasing the combined data transfer.Type: ApplicationFiled: November 2, 2001Publication date: May 8, 2003Inventors: Joseph S. Cavallo, Stephen J. Ippolito