Patents by Inventor Joseph Schweiray Lee

Joseph Schweiray Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9864647
    Abstract: A method and system for adjusting bandwidth within a portable computing device based on danger signals monitored from one on more elements of the portable computing device are disclosed. A danger level of an unacceptable deadline miss (“UDM”) element of the portable computing device may be determined with a danger level sensor within the UDM element. Next, a quality of service (“QoS”) controller may adjust a magnitude for one or more danger levels received based on the UDM element type that generated the danger level and based on a potential fault condition type associated with the particular danger level. The danger levels received from one UDM element may be mapped to at least one of another UDM element and a non-UDM element. A quality of service policy for each UDM element and non-UDM element may be mapped in accordance with the danger levels.
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: January 9, 2018
    Assignee: QUALCOM Incorporated
    Inventors: Serag Gadelrab, Cristian Duroiu, Vinod Chamarty, Pooja Sinha, John Daniel Chaparro, Anil Vootukuru, Vinodh Ramesh Cuppu, Joseph Schweiray Lee, Vinay Mitter, Paul Chow, Ruolong Liu, Johnny Jone Wai Kuan
  • Publication number: 20160127259
    Abstract: A method and system for managing safe downtime of shared resources within a portable computing device are described. The method may include determining a tolerance for a downtime period for an unacceptable deadline miss element of the portable computing device. Next, the determined tolerance for the downtime period may be transmitted to quality-of-service (“QoS”) controller. The QoS controller may determine if the tolerance for the downtime period needs to be adjusted. The QoS controller may receive a downtime request from one or more shared resources of the portable computing device. The QoS controller may determine if the downtime request needs to be adjusted. Next, the QoS controller may select a downtime request for execution and then identify which one or more unacceptable deadline miss elements of the portable computing device that are impacted by the selected downtime request.
    Type: Application
    Filed: January 2, 2015
    Publication date: May 5, 2016
    Inventors: CRISTIAN DUROIU, VINOD CHAMARTY, SERAG GADELRAB, MICHAEL DROP, POOJA SINHA, RUOLONG LIU, JOHN DANIEL CHAPARRO, VINODH RAMESH CUPPU, JOSEPH SCHWEIRAY LEE, JOHNNY JONE WAI KUAN, PAUL CHOW, ANIL VOOTUKURU, VINAY MITTER
  • Publication number: 20160117215
    Abstract: A method and system for adjusting bandwidth within a portable computing device based on danger signals monitored from one on more elements of the portable computing device are disclosed. A danger level of an unacceptable deadline miss (“UDM”) element of the portable computing device may be determined with a danger level sensor within the UDM element. Next, a quality of service (“QoS”) controller may adjust a magnitude for one or more danger levels received based on the UDM element type that generated the danger level and based on a potential fault condition type associated with the particular danger level. The danger levels received from one UDM element may be mapped to at least one of another UDM element and a non-UDM element. A quality of service policy for each UDM element and non-UDM element may be mapped in accordance with the danger levels.
    Type: Application
    Filed: January 2, 2015
    Publication date: April 28, 2016
    Inventors: SERAG GADELRAB, CRISTIAN DUROIU, VINOD CHAMARTY, POOJA SINHA, JOHN DANIEL CHAPARRO, ANIL VOOTUKURU, VINODH RAMESH CUPPU, JOSEPH SCHWEIRAY LEE, VINAY MITTER, PAUL CHOW, RUOLONG LIU, JOHNNY JONE WAI KUAN
  • Patent number: 8291306
    Abstract: Provided is a systematic encoder of cyclic codes for partially written codewords in flash memories wherein all bits of an erased but unwritten area have a default value such as one. In the case where the host writes data to one or a plurality of discontinuous fragments in an area reserved for storing the message section of a codeword in the flash memory, the encoder computes the parity of the codeword by using only the data written to the flash memory as input and by asserting that all bits in the gaps between the written fragments have the default erased value, such that after both the data and the parity are written to the flash memory, the area reserved for storing the codeword would contain a valid codeword. On read back, the host reads the entire codeword area from the flash memory without having to distinguish between the written and unwritten fragments.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: October 16, 2012
    Inventor: Joseph Schweiray Lee
  • Patent number: 8145977
    Abstract: Provided are methods for error correction coding (ECC) for flash memory pages which have been erased but have not been programmed. In one method, each ECC code word is bitwise inverted before being programmed into a page, and bitwise inverted again after being read back from the page before entering the decoder. Thus an unwritten page, whose bits are all ones when random errors are absent, appears to the decoder as all zeros, which form a valid code word(s) in linear block codes. In another method, in both page programming and page read, the parity section of each ECC code word is bitwise XORed with the complement of a parity calculated from a message whose bits are all ones. Thus an unwritten page appears to the decoder as a valid ECC code word(s) when random errors are absent.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: March 27, 2012
    Inventor: Joseph Schweiray Lee
  • Patent number: 8074154
    Abstract: Provided are an encoder and a syndrome computer for cyclic codes which process M codeword symbols per cycle where M is greater than or equal to one, whereby the encoder and syndrome computer optionally further provide the configurability of a different M value for each cycle and/or the configurability of a different cyclic code for each codeword. Further provided is a hybrid device which provides the configurability of two modes of operation, whereby in one mode, the hybrid device functions as the encoder as provided above and, in the other mode, the hybrid device functions as the syndrome computer as provided above, with the majority of the components of the hybrid device being shared between the encoding function and the syndrome computing function.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: December 6, 2011
    Inventor: Joseph Schweiray Lee
  • Publication number: 20100005368
    Abstract: Provided is a systematic encoder of cyclic codes for partially written codewords in flash memories wherein all bits of an erased but unwritten area have a default value such as one. In the case where the host writes data to one or a plurality of discontinuous fragments in an area reserved for storing the message section of a codeword in the flash memory, the encoder computes the parity of the codeword by using only the data written to the flash memory as input and by asserting that all bits in the gaps between the written fragments have the default erased value, such that after both the data and the parity are written to the flash memory, the area reserved for storing the codeword would contain a valid codeword. On read back, the host reads the entire codeword area from the flash memory without having to distinguish between the written and unwritten fragments.
    Type: Application
    Filed: July 1, 2009
    Publication date: January 7, 2010
    Inventor: Joseph Schweiray Lee
  • Publication number: 20090100315
    Abstract: Provided are methods for error correction coding (ECC) for flash memory pages which have been erased but have not been programmed. In one method, each ECC code word is bitwise inverted before being programmed into a page, and bitwise inverted again after being read back from the page before entering the decoder. Thus an unwritten page, whose bits are all ones when random errors are absent, appears to the decoder as all zeros, which form a valid code word(s) in linear block codes. In another method, in both page programming and page read, the parity section of each ECC code word is bitwise XORed with the complement of a parity calculated from a message whose bits are all ones. Thus an unwritten page appears to the decoder as a valid ECC code word(s) when random errors are absent.
    Type: Application
    Filed: September 10, 2008
    Publication date: April 16, 2009
    Inventor: Joseph Schweiray Lee
  • Publication number: 20090077449
    Abstract: Provided are an encoder and a syndrome computer for cyclic codes which process M codeword symbols per cycle where M is greater than or equal to one, whereby the encoder and syndrome computer optionally further provide the configurability of a different M value for each cycle and/or the configurability of a different cyclic code for each codeword. Further provided is a hybrid device which provides the configurability of two modes of operation, whereby in one mode, the hybrid device functions as the encoder as provided above and, in the other mode, the hybrid device functions as the syndrome computer as provided above, with the majority of the components of the hybrid device being shared between the encoding function and the syndrome computing function.
    Type: Application
    Filed: September 2, 2008
    Publication date: March 19, 2009
    Inventor: Joseph Schweiray Lee