Abstract: A method of processing objects is disclosed. The method includes grasping an object with an end-effector of a programmable motion device, determining an estimated pose of the object as it is being grasped by the end-effector, determining a pose adjustment for repositioning the object for placement at a destination location in a destination pose, determining a pose adjustment to be applied to the object, and placing the object at the destination location in a destination pose in accordance with the pose adjustment.

Abstract: A voltage generating circuit for generating internal voltage for a packaged integrated circuit memory device, is controllable to provide incremental adjustments in the voltage for testing of the memory device. The voltage generating circuit permits internally generated voltages of the memory device, such as the substrate voltage Vbb, the DVC2 voltage, and the pumped voltage Vccp, to be controlled externally through the application of test signals via the conventional test function, in performing standard device tests such as the static refresh test, logic 1s and 0s margin testing, and the like for packaged memory devices. Also, programmable circuits including programmable logic devices, such as anti-fuses, are provided that are programmable to maintain the voltage at a magnitude to which it is adjusted.

Abstract: A memory device comprising an array of memory cells includes test circuitry which is selectively configurable to interchangeably couple a dummy cell, which neighbors a memory cell at an edge of the array, to a select one of a plurality of different voltages. In a preferred embodiment, the test circuitry is configurable to selectively couple the dummy cell to one of an upper, lower or intermediate supply bus.

Abstract: A method and apparatus for applying a blocking potential for gating inputs of pull-up and pull-down devices of an output driver is described. The blocking potential is applied to either or both of a pull-up or pull-down transistor for reducing leakage current. In particular, a circuit having a voltage generator for producing the blocking polarity potential is connected to a voltage translator. A control signal is provided to the voltage translator for accessing the output driver. During accessing of the output driver, the blocking polarity potential is isolated from gating inputs of the pull-up and pull-down devices of the output driver. In a memory device employing the output driver, the blocking polarity potential is applied when the memory is in a state which does not activate the output driver. The blocking polarity is provided by a voltage divider using a substrate bias potential. A feedback path is employed to follow voltage applied to an output pad through substrate bias voltage.

Abstract: A method and apparatus for applying a blocking potential for gating inputs of pull-up and pull-down devices of an output driver is described. The blocking potential is applied to either or both of a pull-up or pull-down transistor for reducing leakage current. In particular, a circuit having a voltage generator for producing the blocking polarity potential is connected to a voltage translator. A control signal is provided to the voltage translator for accessing the output driver. During accessing of the output driver, the blocking polarity potential is isolated from gating inputs of the pull-up and pull-down devices of the output driver. In a memory device employing the output driver, the blocking polarity potential is applied when the memory is in a state which does not activate the output driver. The blocking polarity is provided by a voltage divider using a substrate bias potential. A feedback path is employed to follow voltage applied to an output pad through substrate bias voltage.