Abstract: An amplifier system may include an output stage configured to provide an amplified output signal at an output thereof based on an input signal, the output stage being connected between first and second supply voltages. A dynamic power supply control system provides the first and second supply voltages, the dynamic power supply being configured to adjust the first and second supply voltages as a function of the input signal such that a difference between the first and second supply voltages remains substantially constant.

Abstract: An amplifier system may include an output stage configured to provide an amplified output signal at an output thereof based on an input signal, the output stage being connected between first and second supply voltages. A dynamic power supply control system provides the first and second supply voltages, the dynamic power supply being configured to adjust the first and second supply voltages as a function of the input signal such that a difference between the first and second supply voltages remains substantially constant.

Abstract: A technique for implementing impedance matching circuits 100 that use the transfer functions of each line impedance model. This technique allows implementation of an impedance match for a diverse number of line impedances reusing the same circuit 100 topology, by simply adjusting coefficients to accommodate different line impedances.

Abstract: A simple, power efficient and inexpensive digital compensation scheme for reducing delay in a digital impedance matching circuit to improve return loss. The scheme employs a digital filter to compensate for the absolute sampling and digital delays associated with a digital impedance matching circuit. The digital filter is based on the low-pass function of a DAC response, and can easily be modified to correct for not only the DAC response delay, but also other delays in the digital impedance matching circuit. The digital filter is very simple to implement and can add or subtract delays from the overall system.

Abstract: A technique for implementing impedance matching circuits 100 that use the transfer functions of each line impedance model. This technique allows implementation of an impedance match for a diverse number of line impedances reusing the same circuit 100 topology, by simply adjusting coefficients to accommodate different line impedances.

Abstract: A simple, power efficient and inexpensive digital compensation scheme for reducing delay in a digital impedance matching circuit to improve return loss. The scheme employs a digital filter to compensate for the absolute sampling and digital delays associated with a digital impedance matching circuit. The digital filter is based on the low-pass function of a DAC response, and can easily be modified to correct for not only the DAC response delay, but also other delays in the digital impedance matching circuit. The digital filter is very simple to implement and can add or subtract delays from the overall system.

Abstract: Digital subscriber modems (8, 15) for use in Asynchronous Digital Subscriber Line (ADSL) communications are disclosed. The central office modem (8) includes a digital transceiver function (10) and an analog front end function (12), where the analog front end function (12) is integrated into a single integrated circuit. According to the disclosed embodiments, the analog front end function (12) includes a transmit and a receive side. On the receive side, an impedance matching circuit (56) is coupled to the input of a programmable gain amplifier (54C). The impedance matching circuit (56) is controlled by the same control signals (C1, C2, C3) as used to select the gain of the programmable gain amplifier (54C), so that a constant input impedance is presented to the signal input (RXP), independent of the selected gain.