Abstract: A data processing system having a host processor, a host memory, a host memory management unit and an input/output bus and further including a separate input/output (I/O) processor with its own local memory for handling the transfer of data between I/O devices on its own I/O processor I/O bus and the host main memory. The I/O processor has the capability of directly accessing main memory via the host standard data channel. The I/O processor has the capability of interrupting the host processor operation in a special way by a "micro-interrupt" process such that the host processor thereby re-allocates the contents of a selected memory allocation unit (MAP) of the host memory management unit faster than using standard interrupt routines.