Abstract: A graph neural network to predict net parasitics and device parameters by transforming circuit schematics into heterogeneous graphs and performing predictions on the graphs. The system may achieve an improved prediction rate and reduce simulation errors.

Abstract: Stacked voltage domain level shifting circuits for shifting signals low-to-high or high-to-low include a storage cell powered by a mid-range supply rail of the stacked voltage domain level shifting circuit, and control drivers powered by moving supply voltages generated by the storage cell, wherein the control drivers coupled to drive gates of common-source configured devices coupled to storage nodes of the storage cell.

Abstract: A level-shifting circuits utilizing storage cells for shifting signals low-to-high or high-to-low include control drivers with moving supply voltages. The moving supply voltages may power positive or negative supply terminals of the control drivers. The control drivers drive gates of common-source configured devices coupled to storage nodes of the storage cell.

Abstract: Embodiments of the present disclosure provided herein include methods, computer readable mediums, apparatus, and systems for facilitating diagnosis and repair of one or more performance states associated with a computing device.

Abstract: Aspects of the disclosure provide for verifying user-generated content (UGC). When the UGC is a review of an entity of a good or service, the review is verified when a UGC verification system determines that the user authoring the review was a consumer of a good or service offered by the entity. At the time of a transaction for a good or service, the UGC verification system can receive and respond to a request by a point-of-sale (POS) system to generate a unique encoding. The POS system may be implemented on a device in communication with, but separate from, a platform implementing the UGC verification system. The UGC verification system tracks receipt of requests to access a content form for leaving a review, so as to ensure that each generated encoding is only used to access the content form once.

Abstract: Embodiments of the present disclosure provided herein include methods, computer readable mediums, apparatus, and systems for facilitating diagnosis and repair of one or more performance states associated with a computing device.

Abstract: A level-shifting circuits utilizing storage cells for shifting signals low-to-high or high-to-low include control drivers with moving supply voltages. The moving supply voltages may power positive or negative supply terminals of the control drivers. The control drivers drive gates of common-source configured devices coupled to storage nodes of the storage cell.

Abstract: Stacked voltage domain level shifting circuits for shifting signals low-to-high or high-to-low include a storage cell and control drivers powered by a mid-range supply rail of the stacked voltage domain level shifting circuit, wherein the control drivers are coupled to drive common-source configured devices coupled to storage nodes of the storage cell.

Abstract: Stacked voltage domain level shifting circuits for shifting signals low-to-high or high-to-low include a storage cell powered by a mid-range supply rail of the stacked voltage domain level shifting circuit, and control drivers powered by moving supply voltages generated by the storage cell, wherein the control drivers coupled to drive gates of common-source configured devices coupled to storage nodes of the storage cell.

Abstract: Voltage level conversion circuits include PMOS pull-down devices or NMOS pull-up devices, and inverters with outputs that determine gate voltages of these devices. The inverters are powered by moving supply voltages, for example complementary supply voltages generated from a pair of cross-coupled inverters. The cross-coupled inverters may implement a data storage latch with the moving supply voltages generated from the internal data storage nodes of the latch.

Abstract: A graph neural network to predict net parasitics and device parameters by transforming circuit schematics into heterogeneous graphs and performing predictions on the graphs. The system may achieve an improved prediction rate and reduce simulation errors.

Abstract: A graph neural network to predict net parasitics and device parameters by transforming circuit schematics into heterogeneous graphs and performing predictions on the graphs. The system may achieve an improved prediction rate and reduce simulation errors.

Abstract: Embodiments of the present disclosure provided herein include methods, computer readable mediums, apparatus, and systems for facilitating diagnosis and repair of one or more performance states associated with a computing device.

Abstract: An electrode assembly includes a first substrate, a first active material composite coating the first substrate, a first electrode tab is formed by an uncoated portion of the first substrate that extends continuously between a first end and a second end of the first substrate. The assembly further includes a second elongate substrate, a second active material composite coating the second substrate, and a second electrode tab formed by an uncoated portion of the second substrate that extends continuously between a first end and a second end of the second substrate. An electrically-insulative separator is between the first substrate and the second substrate. The first substrate and second substrate, stacked together with the separator located between them, are then rolled about a central axis to form a jelly roll.

Abstract: A graph neural network to predict net parasitics and device parameters by transforming circuit schematics into heterogeneous graphs and performing predictions on the graphs. The system may achieve an improved prediction rate and reduce simulation errors.

Abstract: Embodiments of the present disclosure relate to a sensor that alters its photoluminescent properties upon a binding event between a food-borne analyte and an analyte-specific aptamer (ASA). The ASA may recognize and bind the food-borne analyte, which is referred to herein as the binding event. In some embodiments of the present disclosure the ASA is a strand of single-stranded DNA (ssDNA). Some embodiments of the present disclosure the ASA may be conjugated with a chemically modified photoluminescent matrix material. In some embodiments of the present disclosure, the food-borne analyte may be conjugated with a quencher that may be incorporated into the system for reducing false signals.

Abstract: A device for suspending gymnastic rings and handles is described. The device has a power spring to automatically retract a strap onto a spool. There is a cam buckle that holds the strap in place at a desired height. There are marks on the strap to use as reference to easily match the rings to the same height. The device is typically used as a pair, one device for each ring. Many handle and bars can be attached.

Abstract: A multi-stage amplifier circuit equalizes an input signal through multiple signal amplification paths. DC gain is kept substantially constant over frequency, while adjustable high-frequency gain provides equalization (e.g., peaking). Various embodiments include a common source topology, a common gate topology, differential signaling topologies, and a topology suitable for stabilizing a voltage supply against high-frequency transient loads. A system may include one or more integrated circuits that may each include one or more instances of the multi-stage amplifier.

Abstract: Representative embodiments disclose mechanisms to flatten an image comprising at least one curved or bent edge. An image is received from a capture device and a UI is presented that allows a user to define a general vicinity of an item in the image to be flattened. The system analyzes pixels in the general vicinity to identify the highest probability of a corner in each general vicinity. The gradient of pixels between the corners is calculated and pixels scores are calculated based on the gradient. The pixels with the lowest scores between each corner are used as an edge. Smoothing is applied to each edge. Dimensions of the flat representation are calculated and the system maps pixels bounded by the edges and corners to pixels in the flat representation and copies the mapped pixels to the flat representation.