Patents by Inventor Joseph V. Kreinbrink

Joseph V. Kreinbrink has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10819260
    Abstract: An apparatus for an alpha trim adjustment includes a phase delay circuit that creates a phase delay for a gate signal for a switching cycle. The gate signal is for a phase of a three-phase, phase shifted alternating current (“AC”) input of a multi-pulse motor drive powering a direct current (“DC”) motor. The apparatus includes an alpha trim circuit that modifies the phase delay with an alpha trim adjustment to create an adjusted phase delay for the switching cycle, a delay application circuit that applies the adjusted phase delay to the gate signal.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: October 27, 2020
    Assignee: ROCKWELL AUTOMATION TECHNOLOGIES, INC
    Inventors: Joseph V. Kreinbrink, James Huang, Joseph S. Klak, Mark S. Ruetty
  • Publication number: 20200186066
    Abstract: An apparatus for an alpha trim adjustment includes a phase delay circuit that creates a phase delay for a gate signal for a switching cycle. The gate signal is for a phase of a three-phase, phase shifted alternating current (“AC”) input of a multi-pulse motor drive powering a direct current (“DC”) motor. The apparatus includes an alpha trim circuit that modifies the phase delay with an alpha trim adjustment to create an adjusted phase delay for the switching cycle, a delay application circuit that applies the adjusted phase delay to the gate signal.
    Type: Application
    Filed: December 7, 2018
    Publication date: June 11, 2020
    Inventors: JOSEPH V. KREINBRINK, JAMES HUANG, JOSEPH S. KLAK, MARK S. RUETTY
  • Patent number: 9032238
    Abstract: Systems and methods detect when a transition from a first power module to a second power module is taking place and generates a lockout pulse when the transition is detected. The lockout pulse initiates the blocking of a predetermined number of gate pulses from reaching the second power module. When the predetermined number of gate pulses are blocked, the systems and methods reset to allow complete gate pulses to reach the second module, and continues to detect when the next transition takes place.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: May 12, 2015
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Joseph V. Kreinbrink, Joseph S. Klak, Jr.
  • Patent number: 9019734
    Abstract: A gate firing phase shift delay line technique is described for use in DC motor drive systems and is easily adaptable for controlling a plurality of electronically coupled power modules. A drive regulator is configured to produce a master gate firing timing signal for controlling the gate firing pattern of switching devices for a first power module. One or more delay blocks are configured to generate slave gate firing timing signals that are phase locked and identical but delayed in time with respect to the master signal. Each additional delay block is coupled to an additional power module having a set of switching devices controllable by the slave signals. The current output of each power module is summed via summing circuitry to deliver an output suitable to drive motors or other electrical loads in high power applications. The power modules can also be connected in series to combine (sum) the voltages for delivery to an electrical load.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: April 28, 2015
    Assignee: Rockwell Automation Technologies, Inc.
    Inventor: Joseph V. Kreinbrink
  • Publication number: 20130002330
    Abstract: Systems and methods detect when a transition from a first power module to a second power module is taking place and generates a lockout pulse when the transition is detected. The lockout pulse initiates the blocking of a predetermined number of gate pulses from reaching the second power module. When the predetermined number of gate pulses are blocked, the systems and methods reset to allow complete gate pulses to reach the second module, and continues to detect when the next transition takes place.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Inventors: Joseph V. Kreinbrink, Joseph S. Klak, JR.
  • Publication number: 20090033266
    Abstract: A gate firing phase shift delay line technique is described for use in DC motor drive systems and is easily adaptable for controlling a plurality of electronically coupled power modules. A drive regulator is configured to produce a master gate firing timing signal for controlling the gate firing pattern of switching devices for a first power module. One or more delay blocks are configured to generate slave gate firing timing signals that are phase locked and identical but delayed in time with respect to the master signal. Each additional delay block is coupled to an additional power module having a set of switching devices controllable by the slave signals. The current output of each power module is summed via summing circuitry to deliver an output suitable to drive motors or other electrical loads in high power applications. The power modules can also be connected in series to combine (sum) the voltages for delivery to an electrical load.
    Type: Application
    Filed: July 31, 2007
    Publication date: February 5, 2009
    Inventor: Joseph V. Kreinbrink