Abstract: The present disclosure generally relates to managing cruise control settings. A cruise control indicator is displayed at a location that corresponds to a cruise control speed concurrently with a textual indication of the cruise control speed. In response to receiving input, the textual indication ceases to be displayed after a non-zero duration while the cruise control indicator continues to be displayed.

Abstract: In some embodiments, an electronic device performs techniques related to displaying personalized workout suggestions based on completed workouts. In some embodiments, an electronic device performs techniques related to starting an audio-based workout. In some embodiments, an electronic device performs techniques related to displaying information about a workout during playback of workout content. In some embodiments, an electronic device performs techniques related to displaying information about physical activity of a user relative to a group of users. In some embodiments, an electronic device performs techniques related to coordinating display of workout content among multiple devices.

Abstract: In some embodiments, an electronic device performs techniques related to displaying personalized workout suggestions based on completed workouts. In some embodiments, an electronic device performs techniques related to starting an audio-based workout. In some embodiments, an electronic device performs techniques related to displaying information about a workout during playback of workout content. In some embodiments, an electronic device performs techniques related to displaying information about physical activity of a user relative to a group of users. In some embodiments, an electronic device performs techniques related to coordinating display of workout content among multiple devices.

Abstract: The present disclosure generally relates to methods for tracking the performance of a physical activity event. In some embodiments, the method is performed at a computer system that is in communication with one or more perceptual output generation components and one or more sensors and includes detecting a start of a physical activity, providing ongoing feedback relating to a target duration, and if the activity continues for at least the duration, indicating that the activity continued for at least the target duration.

Abstract: The present disclosure generally relates to user interfaces for charging electronic devices. At a first device with a display, detect that at least one of the first device or a second device has entered a wireless charging state. In response to detecting that at least one of the first device or the second device has entered a wireless charging state, and in accordance with a determination that the first device and the second device are being wirelessly charged by the same wireless charging device, display, on the display, an indication of charge status for the second device.

Abstract: The present disclosure generally relates to user interfaces for charging electronic devices. At a first device with a display, detect that at least one of the first device or a second device has entered a wireless charging state. In response to detecting that at least one of the first device or the second device has entered a wireless charging state, and in accordance with a determination that the first device and the second device are being wirelessly charged by the same wireless charging device, display, on the display, an indication of charge status for the second device.

Abstract: The present disclosure generally relates to user interfaces for charging electronic devices. At a first device with a display, detect that at least one of the first device or a second device has entered a wireless charging state. In response to detecting that at least one of the first device or the second device has entered a wireless charging state, and in accordance with a determination that the first device and the second device are being wirelessly charged by the same wireless charging device, display, on the display, an indication of charge status for the second device.

Abstract: An operational amplifier circuit (10) uses a first operational amplifier (16) to selectively provide a boosted drive current in response to an input signal voltage transitioning. The boosted driver current is used by a second operational amplifier (22) having a single high gain stage (76). The output drive current of the operational amplifier circuit (10) is increased to a predetermined maximum value for a predetermined time after an input signal transition in order to source increased current to a capacitive or inductive load only during output signal transitions. Separate current boost circuits (30, 70) in each of the first and second operational amplifiers enable early signal transition detection and ensure continuation of increased current until completion of the signal transition.

Abstract: A cumulative capacitor structure with desirably constant capacitance characteristics is disclosed. In one embodiment, the cumulative capacitor includes a set of four capacitors coupled in parallel between first and second terminals of the cumulative capacitor. In one embodiment, the first capacitor is comprised of a top plate formed of an n-type polysilicon coupled to the first terminal, a bottom plate comprised of a first accumulation/depletion region such as an n-well region coupled to the second terminal, and a first dielectric region between its top and bottom plates. The second capacitor has an n-type polysilicon terminal top plate coupled to the second terminal, an accumulation/depletion region bottom plate coupled to the first terminal, and a dielectric between its top and bottom plate.

Abstract: A data converter (10) and a method for attenuating noise in an output signal generated by the data converter (10). The data converter (10) includes a sigma-delta modulator (16), a digital-to-analog converter (17), a clock generator (19) connected to the digital-to-analog converter (17), and a clock control circuit (18) connected to the clock generator (19). The clock control circuit (18) enables or disables the clock generator (19) in accordance with the single-bit digital signal to cause a notch characteristic in the output signal for attenuating noise in the output signal.

Abstract: Starting with a semiconductor wafer of known type including an internal, planar p-n junction parallel to major surfaces of the wafer, one of the wafer surfaces is covered with a masking layer of silicon nitride. A plurality of intersecting grooves are then sawed through the masking layer for forming a plurality of mesas having sloped walls with each mesa including a portion of the planar p-n junction having edges which intersect and are exposed by the mesa walls. The groove walls and exposed junction edges are glass encapsulated in a process including heating the wafer. The masking layers are then removed in a selective etching process not requiring a patterned etchant mask, and the now exposed silicon surfaces at the top of the mesas, as well as the opposite surface of the wafer, are metal plated. The wafer is then diced along planes through the grooves for providing individual chips each having a glass passivated mesa thereon.

Abstract: An operational amplifier (10) having an inverted output (20) ranging from a return voltage up to a rail supply voltage includes an amplifying stage (12) and: a linear output inverter (14). The linear output inverter (14) includes an inverting pull down stage (16), an output stage controller (17), and a pull up output stage (18). The inverting pull down stage (16) operates to pull the inverted output down to the return voltage when the inverted output is below a first threshold. The pull up output stage (18) operates to pull the inverted output up to the rail voltage when the inverted output (20) is above a second threshold. The first threshold is greater than the second threshold such that both the inverting pull down stage (16) and the pull up output stage (18) operate when the inverted output (20) lies between the first threshold and the second threshold.

Abstract: Significant reductions in the cost of fabrication of epitaxial semiconductor devices without sacrifice of functional characteristics is achieved by eliminating the conventional but costly polishing procedure, instead subjecting the substrate to grinding, cleaning and etching processes in which the grinding removes material from the surface to a depth of at least 65 microns and the etching further removes material to a depth of about 6-10 microns, the grinding preferably being carried out in two steps, the first being a coarse step and the second being a fine step, with the rotated grinding elements dwelling at their respective last grinding positions for a short period of time. The result is the equivalent of the prior art polishing procedure which took considerably longer to carry out and which therefore was much more costly.

Abstract: This invention concerns itself with an improved method of producing sharply defined misfit dislocations; (MD) with a new, inexpensive method of doping these misfit dislocations with Au; with invention that a combination of Au and Pt doping in misfit dislocations is superior to any amount of Au and to some specific placements of the misfit dislocations in the device structure.

Abstract: The all epitaxial process starts with a high resistivity silicon substrate. Alternating layers of silicon and silicon-germanium are epitaxially grown on the substrate under conditions which create a region with misfit dislocations. A low resistivity silicon layer is then grown over the region. The material is inverted such that the high resistivity layer can be used to form the base of the device. The thickness of the high resistivity layer is adjusted to equal the width of the base of the semiconductor device to be fabricated.

Abstract: A reactor for use in a chemical vapor deposition process occurring in a radiant absorption heater system employs a vertical gas flow reaction vessel and a novel substantially solid susceptor configured as a truncated wedge. The susceptor is characterized by a high utilized area, resulting in a high wafer capacity and low power requirement.