Abstract: A fast floating-point multiplication and accumulation unit (fmac) is described. The described fmac uses significantly less hardware, thereby yielding a fast and an inexpensive fmac. This fmac uses an m-bit carry propagation adder instead of a 3 m-bit carry propagation adder and a 2 m-bit normalizer instead of a 3 m-bit normalizer. The normalizer relies on a leading one detection, as opposed to leading one/zero prediction used in known fmac's. Even when the product of the multiplication is opposite in sign to the number added to the product, the fmac, disclosed here, only uses an m-bit adder and a 2 m-bit normalizer.

Abstract: A system and method for translating source code, comprising high level source code with embedded SQL statements, to p-code or machine-language instructions by a one-pass parsing mechanism. The one-pass parsing mechanism generates executable code without the need to generate an intermediate file. Additionally, the p-code or machine-language instructions are annotated with references to the line numbers of the corresponding source code, thereby allowing a source level debugger to debug the source code with embedded SQL statements.