Abstract: A system and method for striping data to multiple storage devices is provided. One embodiment of the present invention sequentially gates data to a plurality of buffers, wherein only those buffers corresponding to storage devices in use are induced to gate in data. The data is then sent to the storage devices in parallel. Other embodiments further include the use of striping buffers alternatingly used to gate in data, and transfer data to the storage devices.

Abstract: A plurality of processors are connected to the interprocessor communications facility in the multiprocessing system of the invention. The interprocessor communications facility has arbitration circuitry, mailbox circuitry, and processor interrupt circuitry. The interprocessor communications facility of the invention is centralized and does not require the use of main storage. This enables processors to communicate with each other in a fast and efficient manner. The arbitration circuitry prevents simultaneous access of the interprocessor communications facility by more than one processor, and decodes the commands sent from the processors and routes them to the processor interrupt circuitry or to the mailbox circuitry, depending on the command. The mailbox circuitry of the invention receives messages from sending processors and provides them to the intended receiving processors in a safe and secure manner.

Abstract: A system for dividing a digital dividend operand N by a digital divisor operand D to obtain a quotient operand Q with minimal execution time and hardware calculates a value NP.sub.0 P.sub.1 . . . P.sub.m, where the value P.sub.0 P.sub.1 . . . P.sub.m has a magnitude such that NP.sub.0 P.sub.1 . . . P.sub.m converges to Q and DP.sub.0 P.sub.1 converges to 1. The divider employs a one's complementation, multiplication and addition sequence to calculate the value NP.sub.0 P.sub.1 . . . P.sub.m.