Patents by Inventor Josephine T. Hamada

Josephine T. Hamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230329612
    Abstract: Methods, devices, and systems related to determining driver capability are described. In an example, a method can include receiving, at a computing device, data associated with a driver from a sensor, inputting the data into an artificial intelligence (AI) model, performing an AI operation using the AI model, and determining whether the driver is capable of driving a vehicle based on an output of the AI model.
    Type: Application
    Filed: April 14, 2022
    Publication date: October 19, 2023
    Inventors: Lisa R. Copenspire-Ross, Nkiruka Christian, Trupti D. Gawai, Josephine T. Hamada, Anda C. Mocuta
  • Patent number: 11367483
    Abstract: Methods, systems, and devices for memory cell selection to enable a memory device to select a targeted memory cell during a write operation are described. The memory device may apply a first pulse to a selected bit line of the targeted memory cell while applying a voltage to deselected word lines to prevent current leakage. If the targeted memory is not selected after the first pulse, the memory device may apply a second pulse to the selected bit line while applying a voltage to the deselected word lines. If the targeted memory cell is not selected following the second pulse, the memory device may apply a third pulse to the selected bit line while applying the voltage to the deselected word lines. The memory device may detect a snapback event after any of the pulses if the targeted memory cell is selected.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: June 21, 2022
    Assignee: Micron Technology Inc.
    Inventors: Josephine T. Hamada, Mingdong Cui, Joseph M. McCrate, Karthik Sarpatwari, Jessica Chen
  • Publication number: 20210151107
    Abstract: Methods, systems, and devices for memory cell selection to enable a memory device to select a targeted memory cell during a write operation are described. The memory device may apply a first pulse to a selected bit line of the targeted memory cell while applying a voltage to deselected word lines to prevent current leakage. If the targeted memory is not selected after the first pulse, the memory device may apply a second pulse to the selected bit line while applying a voltage to the deselected word lines. If the targeted memory cell is not selected following the second pulse, the memory device may apply a third pulse to the selected bit line while applying the voltage to the deselected word lines. The memory device may detect a snapback event after any of the pulses if the targeted memory cell is selected.
    Type: Application
    Filed: November 4, 2020
    Publication date: May 20, 2021
    Inventors: Josephine T. Hamada, Mingdong Cui, Joseph M. McCrate, Karthik Sarpatwari, Jessica Chen
  • Publication number: 20210005254
    Abstract: Methods, systems, and devices for memory cell selection to enable a memory device to select a targeted memory cell during a write operation are described. The memory device may apply a first pulse to a selected bit line of the targeted memory cell while applying a voltage to deselected word lines to prevent current leakage. If the targeted memory is not selected after the first pulse, the memory device may apply a second pulse to the selected bit line while applying a voltage to the deselected word lines. If the targeted memory cell is not selected following the second pulse, the memory device may apply a third pulse to the selected bit line while applying the voltage to the deselected word lines. The memory device may detect a snapback event after any of the pulses if the targeted memory cell is selected.
    Type: Application
    Filed: July 2, 2019
    Publication date: January 7, 2021
    Inventors: Josephine T. Hamada, Mingdong Cui, Joseph M. McCrate, Karthik Sarpatwari, Jessica Chen
  • Patent number: 10867671
    Abstract: Methods, systems, and devices for memory cell selection to enable a memory device to select a targeted memory cell during a write operation are described. The memory device may apply a first pulse to a selected bit line of the targeted memory cell while applying a voltage to deselected word lines to prevent current leakage. If the targeted memory is not selected after the first pulse, the memory device may apply a second pulse to the selected bit line while applying a voltage to the deselected word lines. If the targeted memory cell is not selected following the second pulse, the memory device may apply a third pulse to the selected bit line while applying the voltage to the deselected word lines. The memory device may detect a snapback event after any of the pulses if the targeted memory cell is selected.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: December 15, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Josephine T. Hamada, Mingdong Cui, Joseph M. McCrate, Karthik Sarpatwari, Jessica Chen