Patents by Inventor Josephus A. E. P. van Engelen
Josephus A. E. P. van Engelen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8024501Abstract: A system and method performs speed and connection handshaking between Beta signal ports and/or Bilingual ports in a serial data interface system. A tone pattern generator (e.g., a flip-flop) can be used to generate a tone pattern signal representing approximately 49 MHz to approximately 62 MHz. A selecting system (e.g., a multiplexer, a digital multiplexer, or the like) selectively transmits either the tone pattern signal or a data input signal. These signals include a driver control signal. A serializer serializes either the tone pattern signal or the data input signal. A clock device (e.g., a clock divider) drives the tone pattern generator and the serializer. A driver receives and differentially transmits, along a twister-wire pair, either the serialized tone pattern signal or the serialized data input signal.Type: GrantFiled: January 5, 2009Date of Patent: September 20, 2011Assignee: Broadcom CorporationInventors: Josephus A. E. P. van Engelen, Michael A. Sosnoski
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Publication number: 20090119426Abstract: A system and method performs speed and connection handshaking between Beta signal ports and/or Bilingual ports in a serial data interface system. A tone pattern generator (e.g., a flip-flop) can be used to generate a tone pattern signal representing approximately 49 MHz to approximately 62 MHz. A selecting system (e.g., a multiplexer, a digital multiplexer, or the like) selectively transmits either the tone pattern signal or a data input signal. These signals include a driver control signal. A serializer serializes either the tone pattern signal or the data input signal. A clock device (e.g., a clock divider) drives the tone pattern generator and the serializer. A driver receives and differentially transmits, along a twister-wire pair, either the serialized tone pattern signal or the serialized data input signal.Type: ApplicationFiled: January 5, 2009Publication date: May 7, 2009Applicant: Broadcom CorporationInventors: Josephus A.E.P. van ENGELEN, Michael A. Sosnoski
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Patent number: 7518435Abstract: A power-down biasing circuit includes a current source connected to a drain of a first NMOS transistor through a first switch. A gate of the first NMOS transistor is connected to the current source, and a source of the first NMOS transistor is connected to ground. A first pre-chargeable capacitor is connected between the gate of the first NMOS transistor and ground. A plurality of NMOS transistors form a current multiplier and have gates connected to the current reference. A plurality of current mirrors are connected to drains of the plurality of NMOS transistors and to output switches.Type: GrantFiled: April 16, 2007Date of Patent: April 14, 2009Assignee: Broadcom CorporationInventors: Kwang Young Kim, Josephus A. E. P. Van Engelen
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Patent number: 7480751Abstract: A system and method performs speed and connection handshaking between Beta signal ports and/or a Bilingual ports in a serial data interface system. A tone pattern generator (e.g., a flip-flop) can be used to generate a tone pattern signal representing approximately 49 MHz to approximately 62 MHz. A selecting system (e.g., a multiplexer, a digital multiplexer, or the like) selectively transmits either the tone pattern signal or a data input signal. These signals include a driver control signal. A serializer serializes either the tone pattern signal or the data input signal. A clock device (e.g., a clock divider) drives the tone pattern generator and the serializer. A driver receives and differentially transmits, along a twister-wire pair, either the serialized tone pattern signal or the serialized data input signal.Type: GrantFiled: September 8, 2003Date of Patent: January 20, 2009Assignee: Broadcom CorporationInventors: Josephus A. E. P. van Engelen, Michael A. Sosnoski
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Patent number: 7205826Abstract: A power-down biasing circuit including a current source connected to a drain of a first NMOS transistor through a first switch. A gate of the first NMOS transistor is connected to the current source, and a source of the first NMOS transistor is connected to ground. A first capacitor connected between the gate of the first NMOS transistor and ground. A plurality of NMOS transistors form a current multiplier and have gates connected to the current reference. A plurality of current mirrors are connected to drains of the plurality of NMOS transistors and to output switches.Type: GrantFiled: May 27, 2004Date of Patent: April 17, 2007Assignee: Broadcom CorporationInventors: Kwang Young Kim, Josephus A. E. P. van Engelen
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Patent number: 7161781Abstract: A signal driving system generates an output swinging between a first power supply (e.g., about 1.2 Volts), powering first and second drivers, and a second power supply (e.g., about 3.3 Volts), powering a first current mirror. The second power supply is generated external to the signal driving system and is used to allow for a desired common-mode differential output signal range. However, the second power supply produces voltage at a level above a rating of the devices in the signal driving system. Therefore, protection devices are used to protect the elements of the signal driving system from the second power supply. Accordingly, through use of the signal driving system of the present invention, a high voltage current mode driver can operate in a low voltage process without damaging the devices in the signal driving system.Type: GrantFiled: September 12, 2003Date of Patent: January 9, 2007Assignee: Broadcom CorporationInventors: Josephus A. E. P. van Engelen, Yee Ling Cheung, Mark J Chambers, Darwin Cheung
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Patent number: 7142057Abstract: A system and method are used to accelerate settling or steady state of an amplifier in an amplifier system. This is used to ensure the amplifier reaches steady-state within a specified time period from stand-by or another state without using more current than is needed for steady-state. A comparator in a common-mode feedback system compares a desired amplifier output signal to one or more nodes of the amplifier. A result of the comparison is compared to a threshold value using a comparator in a settling acceleration system. If the result crosses the threshold, a controller turns on a driver in the settling acceleration system. The driver pulls on one or more nodes of the amplifier, which, along with a driver in the amplifier system pulling on the node, quickly brings the amplifier to settling or steady state.Type: GrantFiled: July 18, 2005Date of Patent: November 28, 2006Assignee: Broadcom CorporationInventors: Josephus A. E. P. Van Engelen, Kwang Young Kim, Mark Jonathan Chambers
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Patent number: 6963245Abstract: A system and method are used to accelerate settling or steady state of an amplifier in an amplifier system. This is used to ensure the amplifier reaches steady-state within a specified time period from stand-by or another state without using more current than is needed for steady-state. A comparator in a common-mode feedback system compares a desired amplifier output signal to one or more nodes of the amplifier. A result of the comparison is compared to a threshold value using a comparator in a settling acceleration system. If the result crosses the threshold, a controller turns on a driver in the settling acceleration system. The driver pulls on one or more nodes of the amplifier, which, along with a driver in the amplifier system pulling on the node, quickly brings the amplifier to settling or steady state.Type: GrantFiled: September 3, 2003Date of Patent: November 8, 2005Assignee: Broadcom CorporationInventors: Josephus A. E. P. van Engelen, Kwang Young Kim, Mark J. Chambers