Abstract: Examples include techniques for multipathing over reliable paths and completion reporting. Example techniques include examples of providing reliability over multiple paths routed through a network between a source and a target of a message. Example techniques also include examples of completion reporting for messages sent via packets routed through a network over multiple paths.

Abstract: A system and method for guaranteeing transactional fairness among multiple requesters contending for a common resource in a cache-coherent multiprocessor system is described. Batch processing is used to control servicing of multiple requests made by multiple requesters (such as processors) of a common resource in a cache-coherent multiprocessor system. Specifically, identification numbers are assigned to requests as they are received from the multiple requesters. The identification numbers are then used in conjunction with batch processing to prioritize and guarantee servicing of the requests.

Abstract: A method triggers the transmission of a flow control packet between a receiving device and a sending device on the basis of space available to receive data in a buffer associated with the receiving device. The method increases throughput in a system that requires a flow control packet every predetermined number of clock cycles.

Abstract: An apparatus and method for compensating skew across a plurality of data interfaces includes using a recovered clock signal at an incoming clock rate to regulate output from a deskew interface. The recovered clock is drawn from one of the data interfaces and the data from all the data interfaces is deskewed to the recovered clock signal. A deskew buffer is provided for each data interface. Link logic may also be run in accordance with the recovered clock signal. Alternatively, the link logic may run at a local clock rate and an elastic buffer is coupled between the deskew interface and the link logic.

Abstract: Apparatus and method for generating and checking a cyclical redundancy check value wherein a first device calculates a cyclical redundancy check value on a full set of bits of input data to produce a first value and a second device calculates a cyclical redundancy check value on a subset of the full set of bits of input data to produce a second value. One of the values is selected for transmission to a register. The value in the register is fed back to the devices for iterating the cyclical redundancy check value calculation until it has been completed.

Abstract: A method and apparatus for reordering messages received from a network that includes a number of message sources. The method includes tagging and storing incoming messages, maintaining ordered queues of messages to be processed for each sender and selecting from among the received messages for processing and dequeuing. Selecting may involve an arbitration algorithm and may first require the availability of processing resources for a message to be selected.

Abstract: Apparatus and method for generating and checking a cyclical redundancy check value wherein a first device calculates a cyclical redundancy check value on a full set of bits of input data to produce a first value and a second device calculates a cyclical redundancy check value on a subset of the full set of bits of input data to produce a second value. One of the values is selected for transmission to a register. The value in the register is fed back to the devices for iterating the cyclical redundancy check value calculation until it has been completed.

Abstract: A method triggers the transmission of a flow control packet between a receiving device and a sending device on the basis of space available to receive data in a buffer associated with the receiving device. The method increases throughput in a system that requires a flow control packet every predetermined number of clock cycles.

Abstract: An apparatus and method for compensating skew across a plurality of data interfaces includes using a recovered clock signal at an incoming clock rate to regulate output from a deskew interface. The recovered clock is drawn from one of the data interfaces and the data from all the data interfaces is deskewed to the recovered clock signal. A deskew buffer is provided for each data interface. Link logic may also be run in accordance with the recovered clock signal. Alternatively, the link logic may run at a local clock rate and an elastic buffer is coupled between the deskew interface and the link logic.