Patents by Inventor Joshua A. Hay

Joshua A. Hay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12255974
    Abstract: Embodiments include a method of opening a Quick User Datagram Protocol (UDP) Internet Connections (QUIC) socket on a computing platform, initializing QUIC packet processing of a hardware-based offloader, opening a QUIC connection to the offloader, and transmitting a first QUIC packet to the offloader over the QUIC connection. The hardware-based offloader encrypts and transmits the QUIC packet.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: March 18, 2025
    Assignee: Intel Corporation
    Inventors: Manasi Deval, Gregory J. Bowers, Joshua A. Hay, Maciej Machnikowski, Natalia Wochtman, Joanna Muniak
  • Patent number: 11394666
    Abstract: Particular embodiments described herein provide for a system for enabling communication between a packet processing unit and a network interface controller (NIC) using an extension object, the system can include memory, one or more processors, and a processing unit extension object engine. The processing unit extension object engine can be configured to cause a packet to be received at the packet processing unit, where the packet processing unit is on a system on chip (SoC), add an extension object portion to the packet to create a modified packet, and cause the modified packet to be communicated to the NIC located on the same SoC. In an example, the extension object portion includes type data and partition data. The packet can be an Ethernet packet and the extension object portion can be added before a payload portion of the packet.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: July 19, 2022
    Assignee: Intel Corporation
    Inventors: Anjali S. Jain, Donald Skidmore, Parthasarathy Sarangam, Joshua A. Hay, Ronen Chayat, Andrey Chilikin
  • Publication number: 20190052583
    Abstract: Particular embodiments described herein provide for a system for enabling communication between a packet processing unit and a network interface controller (NIC) using an extension object, the system can include memory, one or more processors, and a processing unit extension object engine. The processing unit extension object engine can be configured to cause a packet to be received at the packet processing unit, where the packet processing unit is on a system on chip (SoC), add an extension object portion to the packet to create a modified packet, and cause the modified packet to be communicated to the NIC located on the same SoC. In an example, the extension object portion includes type data and partition data. The packet can be an Ethernet packet and the extension object portion can be added before a payload portion of the packet.
    Type: Application
    Filed: December 18, 2017
    Publication date: February 14, 2019
    Applicant: Intel Corporation
    Inventors: Anjali S. Jain, Donald Skidmore, Parthasarathy Sarangam, Joshua A. Hay, Ronen Chayat, Andrey Chilikin