Patents by Inventor Joshua Bisges

Joshua Bisges has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12015075
    Abstract: A method of forming a high electron mobility transistor (HEMT) includes: providing a semiconductor structure comprising a channel layer and a barrier layer sequentially stacked on a substrate; forming a first insulating layer on the barrier layer; and forming a gate contact, a source contact, and a drain contact on the barrier layer. An interface between the first insulating layer and the barrier layer comprises a modified interface region on a drain access region and/or a source access region of the semiconductor structure such that a sheet resistance of the drain access region and/or the source access region is between 300 and 400 ?/sq.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: June 18, 2024
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: Kyle Bothe, Joshua Bisges
  • Patent number: 12009417
    Abstract: A GaN-based high electron mobility transistor (HEMT) device includes a semiconductor structure comprising a channel layer and a barrier layer sequentially stacked on a substrate, a drain contact and a source contact on the barrier layer, and a gate contact on the barrier layer between the drain contact and the source contact. A sheet resistance of a drain access region and/or a source access region of the semiconductor structure is between 300 and 400 ?/sq.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: June 11, 2024
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: Kyle Bothe, Joshua Bisges
  • Publication number: 20220376085
    Abstract: A method of forming a high electron mobility transistor (HEMT) includes: providing a semiconductor structure comprising a channel layer and a barrier layer sequentially stacked on a substrate; forming a first insulating layer on the barrier layer; and forming a gate contact, a source contact, and a drain contact on the barrier layer. An interface between the first insulating layer and the barrier layer comprises a modified interface region on a drain access region and/or a source access region of the semiconductor structure such that a sheet resistance of the drain access region and/or the source access region is between 300 and 400 ?/sq.
    Type: Application
    Filed: May 20, 2021
    Publication date: November 24, 2022
    Inventors: Kyle Bothe, Joshua Bisges
  • Publication number: 20220376104
    Abstract: A transistor device includes a semiconductor structure, source and drain contacts on the semiconductor structure, a gate on the semiconductor structure between the source and drain contacts, and a surface passivation layer on the semiconductor structure between the gate and the source or drain contact. The surface passivation layer includes an opening therein that exposes a first region of the semiconductor structure for processing the first region differently than a second region of the semiconductor structure adjacent the gate. Related devices and fabrication methods are also discussed.
    Type: Application
    Filed: May 20, 2021
    Publication date: November 24, 2022
    Inventors: Joshua Bisges, Kyle Bothe, Matthew King
  • Publication number: 20220376099
    Abstract: A GaN-based high electron mobility transistor (HEMT) device includes a semiconductor structure comprising a channel layer and a barrier layer sequentially stacked on a substrate, a drain contact and a source contact on the barrier layer, and a gate contact on the barrier layer between the drain contact and the source contact. A sheet resistance of a drain access region and/or a source access region of the semiconductor structure is between 300 and 400 ?/sq.
    Type: Application
    Filed: May 20, 2021
    Publication date: November 24, 2022
    Inventors: Kyle Bothe, Joshua Bisges