Abstract: An intake manifold includes a body member defining an interior chamber having an upper surface and a perimeter wall depending therefrom and extending to a perimeter edge, which extends in a plane. An air intake port extends through the body member and opens into the interior chamber. An EGR tube extends through an EGR tube port in the body member and the EGR tube opens into the interior chamber. A MAP sensor extends through a MAP port in the body member such that an interior portion of the MAP sensor is positioned in the interior chamber and extends from an interior surface of the body member upper surface by a first distance. A shield member includes a shield wall that depends from the interior surface of the upper surface by a distance larger than the first distance and defines a shielded area about the interior portion of the MAP sensor.

Abstract: Vapor accumulator reservoirs for semiconductor processing operations, such as atomic layer deposition operations, are provided. Such vapor accumulator reservoirs may include a perimeter plenum volume filled with an inert gas, which may reduce or prevent the leakage of external contaminants into a process gas. In some implementations, the reservoir may be constructed from corrosion-resistant materials to reduce internal contaminants into the process gas.

Abstract: An intake manifold includes a body member defining an interior chamber having an upper surface and a perimeter wall depending therefrom and extending to a perimeter edge, which extends in a plane. An air intake port extends through the body member and opens into the interior chamber. An EGR tube extends through an EGR tube port in the body member and the EGR tube opens into the interior chamber. A MAP sensor extends through a MAP port in the body member such that an interior portion of the MAP sensor is positioned in the interior chamber and extends from an interior surface of the body member upper surface by a first distance. A shield member includes a shield wall that depends from the interior surface of the upper surface by a distance larger than the first distance and defines a shielded area about the interior portion of the MAP sensor.

Abstract: Methods of filling a features of partially fabricated semiconductor substrates with metal include depositing a gradient metal nitride layer in the feature. The gradient metal nitride layer decreases in thickness and/or nitrogen concentration with feature depth. At the top of the feature, the gradient metal nitride layer can serve as an adhesion layer during a subsequent planarization. Because the gradient metal nitride layer deceases in thickness and/or nitrogen concentration further into the feature, it occupies less volume in the mid-section and bottom section of the feature. This improves resistivity in the feature. The feature is filled with metal.

Abstract: Disclosed is a novel composition of matter that provides highly efficient energy conversion from NIR to NIR wavelengths, with either up-, down-, or both up- and down-converting transitions. Disclosed is a composition having the molecular formula NaYF4:YbxTmyNdz, where 0?x?0.98, 0?y?0.02, and 0?z?0.06. Also disclosed is a core-shell structure, wherein the core is a composition having the molecular formula NaYF4:YbxTmyNdz, where 0?x?0.98, 0?y?0.02, and 0?z?0.06, and the shell is composition having the molecular formula NaYF4:Ndw, where 0?w?0.1.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some embodiments, thin metal oxynitride or metal nitride nucleation layers are deposited followed by deposition of a pure metal conductor. The nucleation layer is amorphous, which templates large pure metal film grain growth and reduced resistivity. Further, certain embodiments of the methods described below convert most or all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.

Abstract: Provided herein are low resistance metallization stack structures for 3D-NAND applications and related methods of fabrication. In some embodiments, thin metal oxynitride nucleation layers are deposited on dielectric material followed by deposition of a pure metal conductor using process conditions that increase non-molybdenum component element content at the oxynitride-dielectric interface. Certain embodiments of the methods described below convert less than all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some embodiments, thin metal oxynitride or metal nitride nucleation layers are deposited followed by deposition of a pure metal conductor. The nucleation layer is amorphous, which templates large pure metal film grain growth and reduced resistivity. Further, certain embodiments of the methods described below convert most or all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.

Abstract: Provided herein are low resistance metallization stack structures for 3D-NAND applications and related methods of fabrication. In some embodiments, thin metal oxynitride nucleation layers are deposited on dielectric material followed by deposition of a pure metal conductor using process conditions that increase non-molybdenum component element content at the oxynitride-dielectric interface. Certain embodiments of the methods described below convert less than all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.

Abstract: A powered ratchet includes a motor, a mounting portion, and an output member configured to rotate in response to activation of the motor. The output member defines a drive axis. The powered ratchet also includes a release mechanism configured to selectively couple an anvil to the output member. The release mechanism includes a cover coupled to the mounting portion with a track and a locking member positioned between the mounting portion and the cover and operable to slide within the track between a locked position, in which the locking member engages the anvil to secure the anvil to the output member for co-rotation therewith, and a release position, in which the locking member is disengaged from the anvil to facilitate removal of the anvil. The release mechanism also includes a biasing member biasing the locking member to the locked position.

Abstract: Provided herein are methods and apparatuses for forming metal films such as tungsten (W) and molybdenum (Mo) films on semiconductor substrates. The methods involve forming a reducing agent layer, then exposing the reducing agent layer to a metal precursor to convert the reducing agent layer to a layer of the metal. In some embodiments, the reducing agent layer is a silicon- (Si-) and boron- (B-) containing layer. The methods may involve forming the reducing agent layer at a first substrate temperature, raising the substrate temperature to a second substrate temperature, and then exposing the reducing agent layer to 10 the metal precursor at the second substrate temperature. The methods may be used to form fluorine-free tungsten or molybdenum films in certain embodiments. Apparatuses to perform the methods are also provided.

Abstract: Provided herein are methods and apparatuses for filling features metal-containing materials. One aspect of the disclosure relates to a method for filling structures with a metal-containing material, the method including: providing a structure to be filled with a metal-containing material, exposing the structure to multiple deposition cycles, with each deposition cycle including exposure to one or more alternating reducing agent (e.g. hydrogen (H2)) dose/inert gas purge pulses pulse followed by exposure to one or more alternating metal precursor dose pulses and inert gas purge pulses. The metal may be tungsten (W) or molybdenum (Mo) in some embodiments. In some embodiments, the structure is a partially fabricated (3-D) NAND structure. Apparatuses to perform the methods are also provided.

Abstract: Embodiments of methods of filling features with molybdenum (Mo) include depositing a first layer of Mo in a feature including an opening and an interior and non-conformally treating the first layer such that regions near the opening preferentially treated over regions in the interior. In some embodiments, a second Mo layer is deposited on the treated first layer. Embodiments of methods of filling features with Mo include controlling Mo precursor flux to transition between conformal and non-conformal fill.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some embodiments, thin metal oxynitride or metal nitride nucleation layers are deposited followed by deposition of a pure metal conductor. The nucleation layer is amorphous, which templates large pure metal film grain growth and reduced resistivity. Further, certain embodiments of the methods described below convert most or all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.

Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

Abstract: Vapor accumulator reservoirs for semiconductor processing operations, such as atomic layer deposition operations, are provided. Such vapor accumulator reservoirs may include a perimeter plenum volume filled with an inert gas, which may reduce or prevent the leakage of external contaminants into a process gas. In some implementations, the reservoir may be constructed from corrosion-resistant materials to reduce internal contaminants into the process gas.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some embodiments, thin metal oxynitride or metal nitride nucleation layers are deposited followed by deposition of a pure metal conductor. The nucleation layer is amorphous, which templates large pure metal film grain growth and reduced resistivity. Further, certain embodiments of the methods described below convert most or all of the metal oxynitride nucleation layer to a pure metal layer, further lowering the resistivity.

Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.